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authorDaniel Vetter <daniel.vetter@ffwll.ch>2011-09-22 22:20:53 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2011-09-22 22:20:53 +0200
commit194aa1bee632c6dce19238664eb8373e3483de55 (patch)
treeb21a8ab0bf9b04445dc78abacfde9c0ce004d1a2
parent630dd26fb41c64c1e61be6e929e025c1528e9046 (diff)
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drm/i915: y tiling on i915G/i915GM is different
Luckily the kernel has become extremely paranoid about such matters. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--intel/intel_bufmgr_gem.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 22617ec0..1baa0b3f 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -275,7 +275,8 @@ drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
if (*tiling_mode == I915_TILING_NONE)
return ALIGN(pitch, 64);
- if (*tiling_mode == I915_TILING_X)
+ if (*tiling_mode == I915_TILING_X
+ || (IS_915(bufmgr_gem) && *tiling_mode == I915_TILING_Y))
tile_width = 512;
else
tile_width = 128;
@@ -764,7 +765,8 @@ drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
if (IS_GEN2(bufmgr_gem) && tiling != I915_TILING_NONE)
height_alignment = 16;
- else if (tiling == I915_TILING_X)
+ else if (tiling == I915_TILING_X
+ || (IS_915(bufmgr_gem) && tiling == I915_TILING_Y))
height_alignment = 8;
else if (tiling == I915_TILING_Y)
height_alignment = 32;