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| author | Thomas Klausner <wiz@NetBSD.org> | 2014-07-15 19:22:52 +0200 |
|---|---|---|
| committer | Michel Dänzer <michel.daenzer@amd.com> | 2014-07-16 12:15:29 +0900 |
| commit | 72f84b85afbe762b86ea8c095fee01e7d406b131 (patch) | |
| tree | a1e9ac61977650910a5933dfd687194ef5189c07 | |
| parent | e8c3c1358ecaf4e90f7d43762357ae6f8e2022b6 (diff) | |
| download | libdrm-72f84b85afbe762b86ea8c095fee01e7d406b131.tar.gz libdrm-72f84b85afbe762b86ea8c095fee01e7d406b131.tar.bz2 libdrm-72f84b85afbe762b86ea8c095fee01e7d406b131.zip | |
radeon: Remove superfluous parentheses.
Signed-off-by: Thomas Klausner <wiz@NetBSD.org>
| -rw-r--r-- | radeon/radeon_surface.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 109bd6b5..9c3a1923 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -282,7 +282,7 @@ static int r6_surface_init_linear(struct radeon_surface_manager *surf_man, surf_minify(surf, surf->level+i, surf->bpe, i, xalign, yalign, zalign, offset); /* level0 and first mipmap need to have alignment */ offset = surf->bo_size; - if ((i == 0)) { + if (i == 0) { offset = ALIGN(offset, surf->bo_alignment); } } @@ -310,7 +310,7 @@ static int r6_surface_init_linear_aligned(struct radeon_surface_manager *surf_ma surf_minify(surf, surf->level+i, surf->bpe, i, xalign, yalign, zalign, offset); /* level0 and first mipmap need to have alignment */ offset = surf->bo_size; - if ((i == 0)) { + if (i == 0) { offset = ALIGN(offset, surf->bo_alignment); } } @@ -343,7 +343,7 @@ static int r6_surface_init_1d(struct radeon_surface_manager *surf_man, surf_minify(surf, surf->level+i, surf->bpe, i, xalign, yalign, zalign, offset); /* level0 and first mipmap need to have alignment */ offset = surf->bo_size; - if ((i == 0)) { + if (i == 0) { offset = ALIGN(offset, surf->bo_alignment); } } @@ -384,7 +384,7 @@ static int r6_surface_init_2d(struct radeon_surface_manager *surf_man, } /* level0 and first mipmap need to have alignment */ offset = surf->bo_size; - if ((i == 0)) { + if (i == 0) { offset = ALIGN(offset, surf->bo_alignment); } } @@ -632,7 +632,7 @@ static int eg_surface_init_1d(struct radeon_surface_manager *surf_man, surf_minify(surf, level+i, bpe, i, xalign, yalign, zalign, offset); /* level0 and first mipmap need to have alignment */ offset = surf->bo_size; - if ((i == 0)) { + if (i == 0) { offset = ALIGN(offset, surf->bo_alignment); } } @@ -685,7 +685,7 @@ static int eg_surface_init_2d(struct radeon_surface_manager *surf_man, } /* level0 and first mipmap need to have alignment */ offset = surf->bo_size; - if ((i == 0)) { + if (i == 0) { offset = ALIGN(offset, surf->bo_alignment); } } @@ -1524,7 +1524,7 @@ static int si_surface_init_linear_aligned(struct radeon_surface_manager *surf_ma si_surf_minify(surf, surf->level+i, surf->bpe, i, xalign, yalign, zalign, slice_align, offset); /* level0 and first mipmap need to have alignment */ offset = surf->bo_size; - if ((i == 0)) { + if (i == 0) { offset = ALIGN(offset, surf->bo_alignment); } if (surf->flags & RADEON_SURF_HAS_TILE_MODE_INDEX) { @@ -1567,7 +1567,7 @@ static int si_surface_init_1d(struct radeon_surface_manager *surf_man, si_surf_minify(surf, level+i, bpe, i, xalign, yalign, zalign, slice_align, offset); /* level0 and first mipmap need to have alignment */ offset = surf->bo_size; - if ((i == 0)) { + if (i == 0) { offset = ALIGN(offset, alignment); } if (surf->flags & RADEON_SURF_HAS_TILE_MODE_INDEX) { @@ -1669,7 +1669,7 @@ static int si_surface_init_2d(struct radeon_surface_manager *surf_man, } /* level0 and first mipmap need to have alignment */ aligned_offset = offset = surf->bo_size; - if ((i == 0)) { + if (i == 0) { aligned_offset = ALIGN(aligned_offset, surf->bo_alignment); } if (surf->flags & RADEON_SURF_HAS_TILE_MODE_INDEX) { |