// Licensed to the .NET Foundation under one or more agreements. // The .NET Foundation licenses this file to you under the MIT license. // See the LICENSE file in the project root for more information. /*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XX XX XX Lowering for ARM XX XX XX XX This encapsulates all the logic for lowering trees for the ARM XX XX architecture. For a more detailed view of what is lowering, please XX XX take a look at Lower.cpp XX XX XX XX XX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ #include "jitpch.h" #ifdef _MSC_VER #pragma hdrstop #endif #ifndef LEGACY_BACKEND // This file is ONLY used for the RyuJIT backend that uses the linear scan register allocator // The ARM backend is not yet implemented, so the methods here are all NYI. // TODO-ARM-NYI: Lowering for ARM. #ifdef _TARGET_ARM_ #include "jit.h" #include "sideeffects.h" #include "lower.h" #include "lsra.h" /* Lowering of GT_CAST nodes */ void Lowering::LowerCast(GenTree* tree) { NYI_ARM("ARM Lowering for cast"); } void Lowering::LowerRotate(GenTreePtr tree) { NYI_ARM("ARM Lowering for ROL and ROR"); } void Lowering::TreeNodeInfoInit(GenTree* stmt) { NYI("ARM TreeNodInfoInit"); } // returns true if the tree can use the read-modify-write memory instruction form bool Lowering::isRMWRegOper(GenTreePtr tree) { return false; } bool Lowering::IsCallTargetInRange(void* addr) { return comp->codeGen->validImmForBL((ssize_t)addr); } // return true if the immediate can be folded into an instruction, for example small enough and non-relocatable bool Lowering::IsContainableImmed(GenTree* parentNode, GenTree* childNode) { NYI_ARM("ARM IsContainableImmed"); return false; } #endif // _TARGET_ARM_ #endif // !LEGACY_BACKEND