From f5b1b889a0480eecf7068db4a17e8dd35a7ed878 Mon Sep 17 00:00:00 2001 From: Steve MacLean Date: Tue, 16 Jul 2019 10:06:52 -0400 Subject: Add missing Arm64 specific diagnostic code (#25695) * Arm64 ICorDebugRegisterSet float support * Arm64 ICorDebugRegisterSet2 implementation * Add arm64 VLT_REG_FP case * Arm64 add funceval GetRegister SetRegister support --- src/vm/arm64/cgencpu.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'src/vm/arm64/cgencpu.h') diff --git a/src/vm/arm64/cgencpu.h b/src/vm/arm64/cgencpu.h index 997ad7d60f..9a5fc84420 100644 --- a/src/vm/arm64/cgencpu.h +++ b/src/vm/arm64/cgencpu.h @@ -71,6 +71,21 @@ extern PCODE GetPreStubEntryPoint(); //======================================================================= #define MAXFIELDMARSHALERSIZE 40 +inline +ARG_SLOT FPSpillToR8(void* pSpillSlot) +{ + LIMITED_METHOD_CONTRACT; + return *(SIZE_T*)pSpillSlot; +} + +inline +void R8ToFPSpill(void* pSpillSlot, SIZE_T srcDoubleAsSIZE_T) +{ + LIMITED_METHOD_CONTRACT; + *(SIZE_T*)pSpillSlot = srcDoubleAsSIZE_T; + *((SIZE_T*)pSpillSlot + 1) = 0; +} + //********************************************************************** // Parameter size //********************************************************************** -- cgit v1.2.3