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2018-02-14Handle ELEMENT_TYPE_PTR in ILCodeStream::EmitLDIND/EmitSTIND (#16381)Michal Strehovský2-0/+56
2018-02-14Fix ARM/ARM64 hijacking in tail calls (#16039)Jan Vorlicek2-2/+1
2018-02-13Add Sse2 scalar hardware intrinsics testsJacek Blaszczynski138-0/+6380
2018-02-13Implement scalar Sse2 hardware intrinsicsJacek Blaszczynski1-6/+305
2018-02-12Define type initialization semantics for interface instance methods (#16340)Michal Strehovský2-0/+87
2018-02-12Implement SSE4.2 CompareGreaterThanFei Peng5-0/+428
2018-02-12Implement SSE4.1 CompareEqualFei Peng5-0/+728
2018-02-12reenable AVX2 compareEqual.Int64Fei Peng7-7/+643
2018-02-12Merge pull request #16008 from sdmaclea/PR-ARM64-TEST-SIMD-HWINTRINSICCarol Eidt2-0/+2420
2018-02-12Add TestInsertSteve MacLean1-1/+150
2018-02-12Improve diagnosticsSteve MacLean1-0/+18
2018-02-12[Arm64] Add Simd HWIntrinsic testSteve MacLean2-0/+2253
2018-02-12JIT: look for escaping byrefs (#16305)Andy Ayers6-0/+255
2018-02-11Fix stack trace population to get proper source/line info for tier 1 methods ...Koundinya Veluri2-0/+91
2018-02-10Add AVX/AVX2 templete-drien tests and enable containment testsFei Peng106-482/+26117
2018-02-10Add new test templateFei Peng6-0/+844
2018-02-10Add test cases for some AVX/AVX2 intrinsicsFei Peng33-0/+2413
2018-02-09Fix for RETURNTRAP xarch codegen. (#16292)Eugene Rozenfeld2-0/+86
2018-02-09Merge pull request #16308 from sdmaclea/PR-JIT.SIMD.VectorUtil.CheckValueCarol Eidt1-1/+8
2018-02-09Fix JIT.SIMD.VectorUtil.CheckValue<T>Steve MacLean1-1/+8
2018-02-09Merge pull request #16248 from briansull/fix-16065Brian Sullivan4-0/+267
2018-02-09Fix GC reporting for slow tail calls with by-ref-like args (#16264)Koundinya Veluri2-4/+104
2018-02-08Change corefx test process (#16263)Bruce Forstall1-5/+56
2018-02-08Adjust expected file size if ZapDisable is true (#16240)Victor "Nate" Graf1-1/+3
2018-02-08Add tests for Sse2 memory fence instructionsJacek Blaszczynski6-0/+212
2018-02-08Merge pull request #16268 from CarolEidt/Fix16254Carol Eidt2-0/+92
2018-02-07Make it possible to Reflection.Emit default interface methods (#16257)Michal Strehovský2-0/+121
2018-02-07Fixes GitHub Issue 16065Brian Sullivan4-0/+267
2018-02-07Check mismatched types for SIMD copyCarol Eidt2-0/+92
2018-02-07Add configuration to options to submission.py (#16127)Michelle McDaniel1-0/+3
2018-02-06Add test case for contstructor devirtualization example (#16239)Andy Ayers2-0/+78
2018-02-06Fix GC reproting for by-ref-like structs (#16231)Koundinya Veluri2-0/+127
2018-02-06Implement AVX2 LoadAlignedVector256/128NonTemporalFei Peng3-0/+299
2018-02-06Implement SSE3 LoadAndDuplicateToVector128 and LoadDquVector128Fei Peng6-0/+424
2018-02-06Implement AVX LoadAlignedVector256, LoadDquVector256, and LoadVector256Fei Peng9-0/+923
2018-02-06Merge pull request #16228 from fiigii/storeCarol Eidt27-0/+2445
2018-02-06Merge pull request #16006 from BruceForstall/AddWindowsArmCoreFxTestingBruce Forstall3-3/+107
2018-02-06Fix handling of return code for system() calls (#16225)Jan Kotas1-4/+6
2018-02-06Enable Windows ARM32 corefx testingBruce Forstall3-3/+107
2018-02-05Implement SSE2 Store* intrinsicsFei Peng18-0/+1425
2018-02-05Implement AVX Store* intrinsicsFei Peng9-0/+1020
2018-02-05Adding tests for the StoreFence/Prefetch* APIs and the new Sse scalar overloads.Tanner Gooding9-61/+421
2018-02-05Moving a number of the Sse2 hwintrinsic tests to use the test template.Tanner Gooding152-3718/+25955
2018-02-05Adding tests for the SSE2 LoadVector128, LoadAlignedVector128, and LoadScalar...Tanner Gooding9-0/+813
2018-02-04Revert "For corefx testing, use a matching corefx repo version git hash"Jan Kotas1-47/+6
2018-02-04Merge pull request #16182 from CarolEidt/FixDD543057Carol Eidt2-0/+139
2018-02-03JitBench harness improvements (#15151)Noah Falk3-162/+101
2018-02-03Updating the templated x86 hwintrinsic tests to validate Load and LoadAlignedTanner Gooding60-1446/+6419
2018-02-02Consider specialPutArgs for jitStressRegsCarol Eidt2-0/+139
2018-02-02Event Pipe File V3 (#16107)Adam Sitnik1-1/+1
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