Age | Commit message (Collapse) | Author | Files | Lines |
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requirements for i386
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* Introduce a ref-based version of Buffer.Memmove
* Remove pinning logic from Span.CopyTo
* Tweak flow graph of Span.CopyTo / TryCopyTo in order to encourage better codegen
* Push some uncommon logic (one-element buffers, perfectly overlapping buffers) down to Memmove
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Side effect flags need to be recomputed after cloning
an expression, since cloning may involve some simplifications
(e.g., replacing a local with a const).
I also did some minor refactoring and renaming of the side-effect-updating helpers
and made one of them more robust by checking whether a child is null before accessing
its flags.
This fixes VSO 543054 where this problem was encountered in a PMI ARM32 JitStress=2 run.
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* first event changed
* rest of the private events
* whitespace fixes
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Move test code include in global CMakeLists before PAL runtime includes to
avoid conflicts between PAL and system headers.
(ForeignThreadExceptionsNative.cpp -> thread -> functional -> memory ->
cassert -> pal rt "assert.h".) Drop no longer needed remove_definitions
lines -- they're only set by the clrdefinitions.cmake include later in
the file.
Update build instructions to include needed components (ninja,
lttng-ust, python27).
Add missing ElfW() definition when libunwind does not define it.
FreeBSD alloca() is defined in stdlib.h, so include that instead of
alloca.h on FreeBSD.
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COR_IL_METHOD *, which was causing a crash in the DAC (#16003)
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Also expose COMPlus configuration variables to support session configuration and output file path. (#16018)
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* Modify IsEnabled macros used on Windows.
* Fix arithmetic error due to order of operations.
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Embed the result as a System.Private.CoreLib.dll xml resource
for consumption by ILLink.
Update mscorlib.h to make several dependencies explicit.
The actual msbuild task lives in the linker repo:
https://github.com/mono/linker/blob/master/corebuild/integration/ILLink.Tasks/CreateRuntimeRootDescriptorFile.cs
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- Call __asan_handle_no_return in RtlRestoreContext if it doesn't return
and in ThrowExceptionFromContextInternal function;
- Increase alternate signal stack size and use it also for asan.
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Enable tiered jitting for R2R methods
- Included R2R methods and generics over value types in CoreLib for tiered jitting. Tier 0 for R2R methods is the precompiled code if available, and tier 1 is selectively scheduled based on call counting.
- Added a delay before starting to count calls for tier 1 promotion. The delay is a short duration after frequent tier 0 jitting stops (current heuristic for identifying startup).
- Startup time and steady-state performance have improved on JitBench. There is a regression shortly following startup due to call counting and tier 1 jitting, for a short duration before steady-state performance stabilizes.
- Added two new config values, one for configuring the call count threshold for promoting to tier 1, and another for specifying the delay from the last tier 0 JIT invocation before starting to count calls
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debugging and profiling. (#15878)"
This reverts commit 5bcfde404803f85451cf0ee9fd6406734cb878ff.
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* Add GetLoadLibrary function for PAL & use in TrackErrorCode
* Finish changes to dllimport.cpp
* Fix unix build errors
* fix windows issues
* Address feedback
* Fix return type
* Address feedback
* Fix return type
* Fix usage of LPCWSTR
* Use shared library string
* Append message strings
* Fix append
* Append newline
* Fix spelling
* Modify error messages
* Resolve conflicts
* Add mac message & stop appending all exceptions
* Fix another error message
* Fix NoName Error
* Add newline to .h file
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Allows a developer to determine *correct* overload called for *async* and *iterators*, from a stacktrace.
Matches the compiler generated containing `Type` to the source method using:
`method.DeclaringType == StateMachineAttribute.StateMachineType` attribute to allow the stack trace to resolve the mangled method name to the correct overload. Also appends the statemachine method name with `+` for iterators.
Resolves: dotnet/corefx#24627
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Disable FP to Unsigned Vector Conversions
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FloorLog2PlusOne (#16002)
* replace keys.Length with length for FloorLog2PlusOne
* fix non-generic sort
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For DAC after initialization MachState using InsureInit method,
register pointers are NULL so we cannot use them to restore register
values.
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The specific failure in #15848 was due to a problem with the AVX encoding of the pinsrw instruction that was exposed when AVX is enabled but AVX2 is not. The code generator generates the (SSE2) 2-operand form, but this is an instruction that needs to be encoded with the dst duplicated when using AVX encodings. So it needs to be added to `IsDstDstSrcAVXInstruction()`.
Investigating this (and adding additional test coverage) revealed that conversions to FP were not implemented correctly for out-of-range values, and providing the same behavior as scalar conversion is complex and costly, with unknown benefit, as this is not expected to be a common scenario. So, don't recognize these as intrinsics (revert to the IL implementation).
Also, fix the test to cover more cases.
Fix 15848
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* delete fgArgInfoPtr
* delete treeLstPtr
* delete treeStmtLstPtr
* delete fgArgTabEntryPtr
* delete BasicBlockPtr
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CLR_DEBUGGING_PROCESS_FLAGS for VS. (#15973)
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This saves 50 kB on a hello world app.
This is using the existing ReflectionBlocked attribute to manually block public types that get otherwise blocked by the IL2IL toolchain in Project N. These types are public within the repo, but should be considered private implementation details everywhere else.
Wrote a small tool that would let me identify these: https://gist.github.com/MichalStrehovsky/e2ddec899d3e0db6eba95bf68694b40e. There is more.
Signed-off-by: dotnet-bot <dotnet-bot@microsoft.com>
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(#15957)
* [Local GC] FEATURE_EVENT_TRACE 2/n: Scaffolding for porting known events to callbacks on GCToEEInterface
* Code review feedback: remove `descriptor` system for known events and instead use the gcevents xmacro to generate calls to `GCEventStatus::IsEnabled` with known constants
* Remove more event descriptor code
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Adjust minRegs for SELECT stress modes
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Fix 64 bit shift inconsistencies (on 32 bit targets)
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* [Local GC] FEATURE_EVENT_TRACE 1/n: Add infrastructure for keeping event state within the GC and plumbing to communicate event state changes
* Code review feedback: use a load without a barrier in IsEnabled and put debug-only code under TRACE_GC_EVENT_STATE
* Address code review feedback: add EventPipe callback and comments
* Fix the non-FEATURE_PAL build
* Fix an issue where the GC fails to react to ETW callbacks to occur before the GC is initialized (e.g. on startup when an ETW session is already active)
* Simplify callback locking scheme
* Add a separate callback for each EventPipe provider and funnel them all through a common handler
* Fix non-FEATURE_PAL build
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Default interface methods might end up being ambiguous. This thows an exception we need to catch.
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The result of the devirtualization for a method on a generic type should be an instantiating stub, but this doesn't seem to work right.
Fixing that is a perf issue (that can be triaged/punted - #15977). This commit is a correctness fix to avoid bad codegen for that case.
Resolves #15591.
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My recent refactoring to put all the `minRegCandidateCount` computation in one place failed to take into account that the `LSRA_SELECT` stress modes can also overly constrain the number of registers. Therefore, it needs to be applied only after the `minRegCandidateCount` has been computed. This may in turn cause new conflicts between the def and use of a tree temp, so factor out the code that checks for that.
Fix #15932
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* Misc Span/Memory additions
- Add MemoryMarshal.CreateSpan to replace DangerousCreate
- Add MemoryMarshal.CreateReadOnlySpan to replace DangerousCreate
- Add MemoryMarshal.Cast to replace NonPortableCast
- Add ToString override to Span and ReadOnlySpan
- Add ToEnumerable function to MemoryMarshal that takes a ReadOnlyMemory
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Signed-off-by: dotnet-bot-corefx-mirror <dotnet-bot@microsoft.com>
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Signed-off-by: dotnet-bot <dotnet-bot@microsoft.com>
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Reconcile deltas with CoreRT and refactor interop to follow coding conventions
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Updating the VM to no longer treat the SIMD HWIntrinsic types as HFA or MultiReg structs
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Removed all usages of AppDomainLeaks configuration option and
CHECK_APP_DOMAIN_LEAKS feature
Fix #12094
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Consistency with CoreFX and coding conventions.
Also delete a few other pieces of unused code.
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* Define Interop.Kernel32.MAX_PATH
For consistency with CoreFX and coding conventions.
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Fix a minor bug
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The timezone ids used case insensitive comparisons everywhere, except in the dictionary used to cache timezones.
Fixes dotnet/corefx#26479
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Allow implicit conversion of null arrays to empty Memory instances
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Recent shift changes made the JIT_LLsh helper mask the shift count to 6 bits. The other 2 helpers (JIT_LRsh and JIT_LRsz) so now we get inconsistencies such as `(x >> 64) != (x << 64)`.
The ECMA spec says that "the return value is unspecified if shiftAmount is greater than or equal to the width of value" so the JIT has no obligation to implement a particular behavior. But it seems preferable to have all shift instructions behave similarly, it avoids complications and reduces risks.
This also changes `ValueNumStore::EvalOpIntegral` to mask the shift count for 64 bit shifts so it matches `gtFoldExprConst`. Otherwise the produced value depends on the C/C++ compiler's behavior.
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