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2017-01-09Merge pull request #8856 from pgavlin/LVAThroughputPat Gavlin1-125/+156
Encapsulate live var analysis in its own class.
2017-01-09Format code and improve a function name.Pat Gavlin1-9/+19
2017-01-09Fix some comments.Pat Gavlin1-3/+3
2017-01-09Encapsulate live var analysis in its own class.Pat Gavlin1-125/+146
This change moves the implementation of live variable analysis from a single function into a class in which the per-block portion of the algorithm is contained in its own function. There is no functional change.
2017-01-09Fix x86/Linux Release Build Error (#8852)Jonghyun Park1-2/+2
2017-01-06Simplify lclNum fetching and a few assertions.Pat Gavlin1-11/+4
2017-01-06Remove the `asgdLclVar` analysis from liveness.Pat Gavlin3-184/+32
This analysis is not necessary for correctness and does not appear to have any impact on the generated code: in particualr, internal assembly diffs show no changes with this analysis disabled. For example, consider the following statement: `(asg (lclVar V0) (add (lclVar V0) (icon 4)))` Under the `asgdLclVar` analysis, the visit of the lclVar node that is an operand to the add would mark the lclVar node that is the target of the assignment with `GTF_VAR_USEDEF` and exit without adding V0 to the current set of used lclVars. Instead, the visit of the lclVar node that is the target of the assignment would add V0 to both the set of used lclVar nodes and the set of defined lclVar nodes. With this analysis disabled, the visit of the lclVar node that is an operand to the add will add V0 to the set of used lclVar nodes and the visit of the lclVar node that is the target of the assignment will add V0 to the set of defined lclVar nodes. In both cases, the result is the same.
2017-01-05Remove `BasicBlock::bbVarTmp`.Pat Gavlin4-6/+0
This field was never used.
2017-01-05Fix unsigned_abs function on Unix (#8805)Jan Vorlicek1-4/+0
The unsigned_abs function in jit.h is implemented using labs function. However labs has 32 bit argument / result, while the unsigned_abs expects it to be 64 bit. The correct function to use for FEATURE_PAL is llabs. But since we now have abs overload for __int64 in pal.h, we can just remove the #ifdef for FEATURE_PAL and use the same implementation for both Unix and Windows.
2017-01-04Merge pull request #8809 from pgavlin/FixJitStressFailurePat Gavlin1-0/+2
Add a missing ref count bump in DecomposeLclFld.
2017-01-04Merge pull request #8711 from sivarv/simdAbsOptSivarv6-125/+266
Accelerate Abs intrinsic even in cases where there is no direct instruction support available.
2017-01-04Fix VSO 359733. (#8803)Pat Gavlin1-3/+5
* Fix VSO 359733. This bug was an assertion when extracting side effects that failed when checking that the presence or absence of value numbers on the head of the side effect list matched the presence or absence of value numbers on the node being added to the list. This condition does not hold when remorphing, as remorphing may create nodes without value numbers. In this case, the new comma node will have no value numbers for conservative correctness. The failing assertion was weakened to allow the presence/absence of value numbers on the head of the list and the node being added to differ during remorphing.
2017-01-04Add a missing ref count bump in DecomposeLclFld.Pat Gavlin1-0/+2
DecomposeLclFld transforms a single lclFld node into two lclFld nodes that reference the same lclVar, but was missing a corresponding ref count bump. This was causing a failure in JIT/Methodical/fp/exgen/10w5d_cs_do under JITStress=1 and JITStress=2.
2017-01-04Fix DevDiv 362706Michelle McDaniel1-0/+10
The issue here was that when we morphed a mod into a sub mul div, we would ultimately decrease the ref counts to the numerator of the original mod without performing a corresponding increase. The fix is to increase the ref count when morphing into the sub mul div.
2017-01-04Accelerate Abs intrinsic even in cases where there is no direct instruction ↵sivarv6-125/+266
support available.
2017-01-03Merge pull request #8757 from JosephTremoulet/FixHeapLiveInJoseph Tremoulet2-24/+3
Fix heap live-in calculation
2017-01-03Merge pull request #8789 from pgavlin/VSO359737Pat Gavlin1-1/+4
Fix DevDiv bug 359737.
2017-01-03Add a comment per code review.Pat Gavlin1-0/+2
2017-01-03Adjust ref counts during EH normalization (#8713)Andy Ayers1-0/+5
EH normalization can leave incorrect ref counts. This caused asserts in a few cases with the forthcoming finally cloning, as these EH related blocks were exposed to flow optimizations.
2017-01-03Fix DevDiv bug 359737.Pat Gavlin1-1/+2
This bug was an assertion during CSE that ensures that all CSE candidates have value numbers. This assertion tripped because an earlier CSE in the same tree as the faulty candidate re-morphed modulus by a constant into a divide and subtract; the resulting tree was left without value numbers. This change disables the problematic transform when remorphing as part of CSE.
2016-12-30Fix heap live-in calculationJoseph Tremoulet2-24/+3
Update the code in liveness that sets the `fgCurHeapUse` flag (which needs to identify whether the current block has an upwards-exposed use of the heap) to set this unconditionally for opcodes that use the heap. Previously, this code was avoiding setting the flag if the block has a prior def of the heap, but in the absence of a guarantee to the contrary, we must assume that the heap use may not alias the heap def, and so still be upwards-exposed and cause the heap to be live-in to the block. Also remove the OptRepeat workaround for the lack of this, in `ResetOptAnnotations`. Fixes #7846.
2016-12-30Remove dead parameter in value-numberingJoseph Tremoulet2-10/+5
Parameter `newVNsForPhis` of method `fgValueNumberBasicBlocks` is unused; its presence and comment are confusing/misleading. What actually happens is that `fgValueNumberBlock` itself checks whether the value numbers for incoming Phi args' SSA defs are defined yet or not.
2016-12-22ARM: A step towards the RyuJIT/ARM32 backend.Mikhail Skvortcov8-137/+1697
2016-12-21Use Pabsd/pabsw/pabsb instructions for Abs SIMD intrinsic on SSE4 and above ↵sivarv5-10/+60
targets.
2016-12-21Merge pull request #8697 from sivarv/lockAddFixSivarv1-1/+26
Fix GT_LOCKADD register specification.
2016-12-20Fix GT_LOCKADD register specification.sivarv1-1/+26
2016-12-20Merge pull request #8693 from JosephTremoulet/ValueNumberFieldJoseph Tremoulet1-4/+3
Use field type value-numbering local field stores
2016-12-20Use field type value-numbering local field storesJoseph Tremoulet1-4/+3
Method `VNPairApplySelectorsAssign` takes the type of the value being assigned, so when processing a store to a field of a local struct, pass the type of the field rather than the type of the local; failure to do so was blocking propagation of the value number to subsequent loads of the same field due to the type mismatch.
2016-12-19Merge pull request #8674 from AndyAyersMS/BiggerBlockFlagAndy Ayers4-21/+20
Widen basic block flag field to 64 bits
2016-12-18Remove Read/WriteProcessMemory from PAL. (#8655)Mike McLaughlin1-0/+4
Ifdef more unused code that uses ReadProcessMemory. Move the current memory probing in the transport to PAL_ProbeMemory. Add PAL_ProbeMemory to dac PAL exports. PAL_ProbeMemory may be changed to use write/read on a pipe to validate the memory as soon as we make it perform as well as the current code. Remove ReadProcessMemory tests and add PAL_ProbeMemory pal tests.
2016-12-17Widen basic block flag field to 64 bitsAndy Ayers4-21/+20
Flag field is currently full, and I need at least one more bit to identify the start of a cloned finally. Widen to 64 bits and update a few uses. Also removed an unused copy.
2016-12-15Merge pull request #8642 from CarolEidt/Fix359736Carol Eidt1-0/+8
Correctly sequence fgMorphModToSubMulDiv
2016-12-15Merge pull request #8207 from CarolEidt/StreamlineResolutionCarol Eidt2-61/+198
Streamline LSRA resolution
2016-12-15Merge pull request #8329 from litian2025/Fix_SIMDScalarMoveEncodingSivarv2-17/+19
Fix SIMD Scalar Move Encoding: VEX.L should be 0
2016-12-14Fix SIMD Scalar Move Encoding: VEX.L should be 0Li Tian2-17/+19
For SIMD Scalar Move instructions such as vmovlpd, vmovlps, vmovhps, vmovhps and vmovss on AVX system, JIT should ensure that those instructions are encoded with VEX.L=0, because encoding them with VEX.L=1 may encounter unpredictable behavior across different processor generations. The reason of VEX.L is encoded with 1 is because JIT calls compiler->getSIMDVectorType() which returns EA_32BYTE, and it is been passed into emitter AddVexPrefix() which ends up encoded VEX.L=1, the fix is to pass target type and base type for those instructions to ensure that VEX.L=0 at emitter AddVexPrefix() Fix #8328
2016-12-14Correctly sequence fgMorphModToSubMulDivCarol Eidt1-0/+8
This method was creating a temp, but the final result was a GT_SUB with a use of the temp as its op1, and it was not setting GTF_REVERSE_OPS. This led to a liveness assert in LSRA.
2016-12-14Fix ref count adjustment in `fgMorphBlockStmt`.Pat Gavlin1-6/+6
LclVar ref counts must be incremented before attempting to remove the morphed statement, since doing so decrements ref counts (and thus requires refcounts to be conservatively correct). Fixes VSO 359734.
2016-12-14Merge pull request #8601 from pgavlin/gh7963Pat Gavlin7-45/+84
Fix consume-order checking in codegen.
2016-12-14Add support for R2R ldvirtftn helpers (#8608)Michal Strehovský1-5/+17
The codegen for the non-readytorun path (used on CoreCLR) requires the runtime to support general purpose virtual method resolution based on a method handle. CoreRT doesn't have such helpers.
2016-12-13Merge pull request #8617 from hqueue/arm/test20161210/IsContainableImmedBruce Forstall1-1/+67
Ryujit/ARM32 Initial Lowering::IsContainableImmed for ARM
2016-12-13Fix the ARM32 build.Pat Gavlin1-2/+2
2016-12-13Fix consume-order checking in codegen.Pat Gavlin6-43/+82
The switch to LIR invalidated the correspondence between a node's sequence number and the order in which it must be consumed with respect to other nodes. This in turn made the consume-order checks during code generation incorrect. This change introduces a new field, `gtUseNum`, that is used during code generation to check the order in which nodes are consumed. Re-enabling these checks revealed a bug in code generation for locked instructions on x86, which were consuming their operands out-of-order; this change also contains a fix for that bug. Fixes #7963.
2016-12-13Fix incorrect compare narrowing in TreeNodeInfoInitCmpMike Danes1-27/+26
TreeNodeInfoInitCmp attempts to eliminate the cast from `cmp(cast<ubyte>(x), icon)` by narrowing the compare to ubyte. This should only happen if the constant fits in a byte so it can be narrowed too, otherwise codegen produces an int sized compare. (or a byte sized compare with a truncated constant if we try to use GTF_RELOP_SMALL).
2016-12-13Ryujit/ARM32 Initial Lowering::IsContainableImmed for ARMHyung-Kyu Choi1-1/+67
Initial implementation of IsContainableImmed for ARM. Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
2016-12-12Merge pull request #8520 from hqueue/arm/test20161208/lowercastCarol Eidt1-2/+68
Ryujit/ARM32: Implement Lowering::LowerCast for ARM
2016-12-13Ryujit/ARM32 Implement Lowering::LowerCast for ARMHyung-Kyu Choi1-2/+68
Simple integer to interger type conversion is passed. Add comment for LowreCast with C++ comment style. Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
2016-12-12Merge pull request #8532 from sivarv/fixedRegFixSivarv1-43/+39
Fix to issue 8286.
2016-12-12Merge pull request #8541 from briansull/vso-287671Brian Sullivan1-0/+2
Fix missing flags on GT_DYN_BLK node
2016-12-10Fix typo in clang-format directive and reformat end of flowgraph.cpp (#8573)Andy Ayers1-845/+822
Last 4K or so lines of flowgraph.cpp were not being formatted because the clang-format on directive had a typo. Fix the typo and reformat the latter part of the file.
2016-12-09Fix to issue 8286.sivarv1-43/+39