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:
platform/upstream/coreclr
accepted/tizen_4.0_base
accepted/tizen_4.0_unified
accepted/tizen_5.0_base
accepted/tizen_5.5_unified
accepted/tizen_5.5_unified_mobile_hotfix
accepted/tizen_5.5_unified_wearable_hotfix
accepted/tizen_6.0_unified
accepted/tizen_6.0_unified_hotfix
accepted/tizen_6.5_unified
accepted/tizen_base
accepted/tizen_common
accepted/tizen_ivi
accepted/tizen_mobile
accepted/tizen_tv
accepted/tizen_unified
asoldatov
backup/release/2.0.0_tizen/20170828
backup/release/2.0.0_tizen/20170906
backup/tizen_5.5/20190304
backup/tizen_base_2.0.0
backup/tizen_base_2.1.1-upd2
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sandbox/adrob/asan
sandbox/adrob/asan.old
sandbox/akazmin/asan_annotate_buff
sandbox/ches01/asan
sandbox/ches01/asan_ARM
sandbox/ches01/asan_ARM_v2
sandbox/ches01/asan_amd64
sandbox/ches01/asan_amd64_intel_syntax
sandbox/ches01/asan_amd64_v2
sandbox/ches01/integrate-libasansi
sandbox/ches01/integrate-libasansi_debug
sandbox/ches01/integrate-libasansi_debug_v2
sandbox/denis13/gcc6x
sandbox/dkson95/clang
sandbox/dkson95/gcc_6_2_1
sandbox/dkson95/hardfp
sandbox/dkson95/hardfp_rebase
sandbox/dkson95/integrate-libasansi
sandbox/dkson95/tizen
sandbox/giuliana/fix_llvm_path
sandbox/giuliana/gcc_6_2_1
sandbox/giuliana/x86_baselibs
sandbox/jaehun77/hardfp
sandbox/mkashkarov/debug_build
sandbox/mkashkarov/test
sandbox/mkashkarov/tizen_6.0_build
sandbox/nmerinov/llvm
sandbox/vbarinov/clean-clang
sandbox/wangbiao/rpm_upgrade
tc
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tizen_5.5_tv
tizen_5.5_wearable_hotfix
tizen_6.0
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Domain: Dotnet / Core; Licenses: MIT;
Alexander Soldatov <soldatov.a@samsung.com>, Dmitri Botcharnikov <dmitry.b@samsung.com>, Igor Kulaychuk <i.kulaychuk@samsung.com>
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path:
root
/
src
/
jit
/
lsra.h
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Commit message (
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Author
Files
Lines
2019-04-22
Fix Arm64 UpperVector save/restore (#24043)
Carol Eidt
1
-8
/
+31
2019-04-15
Fix lsraBlockEpoch check.
Sergey Andreenko
1
-0
/
+4
2019-04-04
Improve Upper Vector Save/Restore (#23344)
Carol Eidt
1
-13
/
+31
2019-04-01
LSRA cleanup (#23617)
Carol Eidt
1
-11
/
+15
2019-03-29
Use GenTreeStmt* where it is implied. (#22963)
Sergey Andreenko
1
-1
/
+1
2019-03-26
Handle addressing modes for HW intrinsics (#22944)
Carol Eidt
1
-0
/
+1
2019-02-12
Fix min-opts spill of tree temp large vectors (#22530)
Carol Eidt
1
-3
/
+1
2019-02-02
Spill tree temp large vectors around calls (#22311)
Carol Eidt
1
-2
/
+1
2019-02-02
Propagate preferences (#19429)
Carol Eidt
1
-9
/
+55
2019-01-08
Fix VZERoUPPER for HW intrinsic
Fei Peng
1
-1
/
+1
2018-10-18
[RyuJIT] Delete dead code (#20411)
mikedn
1
-19
/
+0
2018-09-06
Cleanup LinearScan::BuildCast
Mike Danes
1
-1
/
+1
2018-07-17
Kill RCX when used by shift
Carol Eidt
1
-0
/
+1
2018-07-03
Remove Interval::isMultiReg
Carol Eidt
1
-5
/
+0
2018-06-30
Pass CompAllocator by value (#15025)
mikedn
1
-56
/
+6
2018-06-14
[Windows|Arm64|Vararg] Add FEATURE_ARG_SPLIT (#18346)
Jarret Shook
1
-2
/
+2
2018-06-14
ARM: increase small reg set for jitStressRegs=3 (#18462)
Carol Eidt
1
-1
/
+3
2018-06-04
Fix error during compilation with /permissive- (#18272)
Andrey Kurdyumov
1
-1
/
+1
2018-05-23
Create RefPositions without TreeNodeInfo (#16517)
Carol Eidt
1
-246
/
+195
2018-05-22
Remove JIT LEGACY_BACKEND code (#18064)
Bruce Forstall
1
-3
/
+1
2018-04-20
Treat EDI as killed by MaskMove
Carol Eidt
1
-1
/
+4
2018-04-17
Unix/x64 ABI cleanup
Carol Eidt
1
-2
/
+2
2018-04-09
Handle last uses that become contained
Carol Eidt
1
-0
/
+22
2018-03-24
[RyuJit/ARM] Fix lsra BuildShiftRotate (#17103)
Sergey Andreenko
1
-0
/
+5
2018-03-21
Remove REG_OPT_RSVD from LSRA's candidate masks if it's reserved.
Carol Eidt
1
-1
/
+1
2018-02-02
Consider specialPutArgs for jitStressRegs
Carol Eidt
1
-0
/
+5
2018-02-01
Refactor RefPosition and Interval Building
Carol Eidt
1
-37
/
+127
2018-01-31
Delete GenTreePtr. (#16027)
Sergey Andreenko
1
-1
/
+1
2018-01-23
Adjust minRegs for SELECT stress modes
Carol Eidt
1
-0
/
+2
2018-01-19
Fix desktop build
Bruce Forstall
1
-1
/
+1
2018-01-10
Fix ARM GCStress hole with byref write barrier helper
Bruce Forstall
1
-0
/
+3
2018-01-05
Refactor minRegCount and eliminate auto
Carol Eidt
1
-13
/
+8
2018-01-03
Normalize lsra.h line endings
Steve MacLean
1
-2091
/
+2091
2017-12-20
LSRA: Replace operandToLocationInfoMap with a list
Carol Eidt
1
-12
/
+47
2017-12-18
Eliminate gtLsraInfo from GenTree
Carol Eidt
1
-1784
/
+2056
2017-11-10
[ARM64] SIMD Partial Callee Save SIMD12
Steve MacLean
1
-3
/
+11
2017-11-06
Merge pull request #14506 from mikedn/alloc-mess
Brian Sullivan
1
-7
/
+6
2017-11-06
Merge pull request #14840 from CarolEidt/ShrinkLSRADump
Carol Eidt
1
-4
/
+10
2017-11-03
Unassign both floats if assigning double
Carol Eidt
1
-0
/
+1
2017-11-03
LSRA Dump: don't print unused regs
Carol Eidt
1
-4
/
+10
2017-10-31
Fix checking for reg in use
Carol Eidt
1
-2
/
+1
2017-10-31
Merge pull request #14614 from hqueue/arm/ryujit/issue_14374_pr2
Carol Eidt
1
-0
/
+9
2017-10-31
[RyuJIT/ARM32] Fix resolving TYP_DOUBLE and TYP_FLOAT intervals
Hyung-Kyu Choi
1
-0
/
+9
2017-10-30
Merge pull request #14456 from fiigii/crc32
Carol Eidt
1
-0
/
+4
2017-10-26
Fix FixedReg assert
Carol Eidt
1
-0
/
+9
2017-10-25
Enable Crc32 , Popcnt, Lzcnt intrinsics
Fei Peng
1
-0
/
+4
2017-10-23
Report registers as dead in GCInfo before the RhpPInvoke helper. (#14664)
Sergey Andreenko
1
-2
/
+0
2017-10-19
Remove references to IAllocator that are now useless
Mike Danes
1
-4
/
+4
2017-10-18
Merge pull request #14534 from CarolEidt/RegSelectCleanup
Carol Eidt
1
-15
/
+10
2017-10-18
Merge pull request #14573 from CarolEidt/Fix13751
Carol Eidt
1
-0
/
+1
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