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path: root/src/jit/lsra.cpp
AgeCommit message (Expand)AuthorFilesLines
2018-10-31Arm32: Handle live-out double reg in resolutionCarol Eidt1-4/+9
2018-10-30Fix `JitStressRegs=0x1` issue with `RefTypeUpperVectorSaveDef`. (#20623)Sergey Andreenko1-0/+1
2018-10-17Delete `FixupIfSIMDLocal`. (#20360)Sergey Andreenko1-3/+3
2018-09-20Handle partial multireg COPYCarol Eidt1-0/+10
2018-08-28Handle multiReg COPYCarol Eidt1-22/+33
2018-08-25Remove some GT_ASG_op leftovers (#18205)mikedn1-1/+1
2018-08-22define FMT_BB as "BB%02u" and use it uniformly in the codebaseBrian Sullivan1-15/+15
2018-08-21Cleanup unnecessary casts in roundUpEgor Chesakov1-1/+1
2018-07-19Merge pull request #18999 from CarolEidt/Fix16359Carol Eidt1-9/+2
2018-07-18JIT: force all local var ref counts to be accessed via API (#18979)Andy Ayers1-12/+12
2018-07-18Arm64: Fix handling of IP0 & IP1Carol Eidt1-9/+2
2018-07-16Ensure BuildUse uses the correct reg numberCarol Eidt1-1/+1
2018-07-10Merge pull request #18805 from CarolEidt/Fix18746Carol Eidt1-0/+2
2018-07-06Don't change PUTARG_REG type on arm64Carol Eidt1-0/+2
2018-07-03Merge pull request #18504 from mikedn/comp-smallBruce Forstall1-4/+4
2018-07-03Remove Interval::isMultiRegCarol Eidt1-18/+1
2018-06-30Move temp info from Compiler to RegSetMike Danes1-4/+4
2018-06-30Pass CompAllocator by value (#15025)mikedn1-5/+2
2018-06-29Corrected a few typos in the documentation and comments (#18706)Phil Garcia1-6/+6
2018-06-28LSRA: fix multi-reg ops under FIELD_LISTCarol Eidt1-0/+4
2018-06-14[Windows|Arm64|Vararg] Add FEATURE_ARG_SPLIT (#18346)Jarret Shook1-6/+10
2018-06-13Fix enregistered lclFld bug (#18418)Carol Eidt1-115/+98
2018-05-24Typo (#18122)John Doe1-2/+2
2018-05-23Create RefPositions without TreeNodeInfo (#16517)Carol Eidt1-199/+59
2018-05-22Remove JIT LEGACY_BACKEND code (#18064)Bruce Forstall1-6/+1
2018-03-30Tighten arm32/arm64 write barrier kill reg setsBruce Forstall1-3/+3
2018-03-28Merge pull request #17126 from CarolEidt/Fix545500Carol Eidt1-3/+44
2018-03-27Fix commentCarol Eidt1-1/+3
2018-03-26Fix conditionCarol Eidt1-2/+16
2018-03-23Merge pull request #17072 from CarolEidt/Fix545505Carol Eidt1-17/+36
2018-03-22ARM: correctly unassign constant doubleCarol Eidt1-4/+2
2018-03-22ARM: Fix reg resolution for doublesCarol Eidt1-3/+28
2018-03-21Fix release buildCarol Eidt1-1/+1
2018-03-21Remove REG_OPT_RSVD from LSRA's candidate masks if it's reserved.Carol Eidt1-16/+24
2018-03-20ARM: call compRsvdRegCheck laterCarol Eidt1-1/+12
2018-03-09Fix LSRA enregisterLocalVarsCarol Eidt1-1/+15
2018-02-22Handle a restored double Interval at block boundaryCarol Eidt1-0/+6
2018-02-18Merge pull request #16422 from CarolEidt/Fix15037Carol Eidt1-5/+12
2018-02-16Don't set delayRegFree if no targetCarol Eidt1-5/+12
2018-02-16Correctly handle check for busy double regCarol Eidt1-15/+33
2018-02-02Consider specialPutArgs for jitStressRegsCarol Eidt1-2/+3
2018-02-01Refactor RefPosition and Interval BuildingCarol Eidt1-2686/+2
2018-01-31Delete GenTreePtr. (#16027)Sergey Andreenko1-27/+27
2018-01-29JIT: don't overlook strong nearby preference in LSRA (#16028)Andy Ayers1-2/+2
2018-01-23Adjust minRegs for SELECT stress modesCarol Eidt1-40/+62
2018-01-10Fix ARM GCStress hole with byref write barrier helperBruce Forstall1-4/+42
2018-01-05Refactor minRegCount and eliminate autoCarol Eidt1-120/+98
2017-12-20LSRA: Replace operandToLocationInfoMap with a listCarol Eidt1-15/+9
2017-12-19Fix for armel double passed as longCarol Eidt1-1/+1
2017-12-18Eliminate gtLsraInfo from GenTreeCarol Eidt1-580/+402
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