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path: root/src/jit/lowerarmarch.cpp
AgeCommit message (Expand)AuthorFilesLines
2018-04-03Remove most ARM NYI (#17365)Bruce Forstall1-7/+2
2018-03-26Merge pull request #15301 from mikedn/cast-unCarol Eidt1-2/+2
2018-03-24Fix Unreachable Code warning in desktop build (#17203)Bruce Forstall1-12/+4
2018-03-20Remove arm32/arm64 dead codeBruce Forstall1-21/+5
2018-03-19Allow arm64 to contain zero in GT_STORE_LCL_FLDBruce Forstall1-0/+1
2018-03-12[Arm64] Mark removed compare zero nodes unusedSteve MacLean1-9/+11
2018-02-21LEA on rhs of block copy can't be containedCarol Eidt1-0/+5
2018-02-14[Arm64] Additional Insert commentsSteve MacLean1-1/+6
2018-02-12Insert contain extractSteve MacLean1-2/+0
2018-02-12Fix inconsistent handling of zero extending castsMike Danes1-2/+2
2018-02-09[Arm64] Implement Simd.InsertSteve MacLean1-3/+33
2018-02-01[Arm64] Add Lower Compare Zero commentsSteve MacLean1-4/+10
2018-02-01[Arm64] Lower Unsigned Compare ZeroSteve MacLean1-1/+46
2018-02-01[Arm64] Implement Simd.ExtractSteve MacLean1-2/+9
2018-01-31Delete GenTreePtr. (#16027)Sergey Andreenko1-20/+19
2018-01-26[Arm64] Initial HWIntrinsic implementationSteve MacLean1-0/+35
2017-12-08[Arm64] SIMDIntrinsicGetItem contain mem op1Steve MacLean1-2/+10
2017-11-29[Arm64] Fix UNROLL_LIMIT logicSteve MacLean1-1/+1
2017-11-14Merge pull request #14975 from sdmaclea/PR-SIMD-genSIMDIntrinsicInit-0Carol Eidt1-1/+5
2017-11-10[ARM64] SIMD genCodeForStoreLclVar zero initSteve MacLean1-0/+5
2017-11-10[ARM64] genSIMDIntrinsicInit contain 0Steve MacLean1-1/+5
2017-11-07Merge pull request #14881 from sdmaclea/PR-ARM64-SIMD-ContainCheckStoreLocBruce Forstall1-6/+0
2017-11-06[Arm64] SIMD ContainCheckStoreLocSteve MacLean1-6/+0
2017-11-03[Arm64] SIMD12 Indirect Load/StoreSteve MacLean1-0/+14
2017-11-02[Arm64] SIMDIntrinsicGetItemSteve MacLean1-1/+4
2017-10-20[Arm64] Basic SIMD loweringSteve MacLean1-0/+71
2017-10-04[Arm64] Implement GT_XADD, GT_XCHG, GT_CMPXCHG ...Steve MacLean1-0/+3
2017-10-02Move JCMP transform to LowerJTrueMike Danes1-40/+1
2017-10-02Reimplement compare flags reuse using SETCC/JCCMike Danes1-23/+1
2017-09-27[Arm64] Respond to feedbackSteve MacLean1-1/+4
2017-09-26[Arm64] Add GT_JCMP nodeSteve MacLean1-0/+34
2017-09-25[Arm64] Repsond to feedbackSteve MacLean1-1/+1
2017-09-25[Arm64] Use GTF_SET_FLAGS/GTF_USE_FLAGSSteve MacLean1-1/+29
2017-09-20Merge pull request #13541 from hqueue/arm/ryujit/issue_12614_enable_unrolling...Bruce Forstall1-3/+0
2017-09-19Merge pull request #14018 from sdmaclea/PR-ARM-Remove-extra-castBrian Sullivan1-16/+5
2017-09-15[RyuJit] fix the inconsistency between setContained and isContained. (#13991)Sergey Andreenko1-16/+1
2017-09-15[Arm/Arm64] LowerCast remove small int widen castSteve MacLean1-16/+5
2017-09-13[RyuJIT/ARM32] Enable unrolling for cpblkHyung-Kyu Choi1-3/+0
2017-09-05[Arm64] Fix Transform AND-CMP to TSTSteve MacLean, Qualcomm Datacenter Technologies Inc1-2/+2
2017-09-05Transform AND-CMP to TSTMike Danes1-0/+2
2017-08-24Merge pull request #11589 from mikedn/gen-amCarol Eidt1-1/+1
2017-08-24Fix improper handling of GenTreeAddrMode offsetMike Danes1-1/+1
2017-08-23Fix ARM issues with ContainmentCarol Eidt1-30/+4
2017-08-16Move Containment Analysis to LoweringCarol Eidt1-13/+109
2017-07-10Extract containment analysisCarol Eidt1-0/+211
2017-06-13[RyuJIT/ARM32] Fix assertion when using invalid imm for INS_add (#12162)Sujin Kim1-1/+4
2017-06-02Add ARM32 support for GT_SETCC/GT_CMP/GTF_SET_FLAGSMike Danes1-0/+1
2017-05-31[RyuJIT/ARM32] Applying review feedbackHyung-Kyu Choi1-4/+13
2017-05-26Apply review feedback to increase readabilityHyung-Kyu Choi1-8/+5
2017-05-25Apply review feedbackHyung-Kyu Choi1-5/+4
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