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path: root/src/jit/lowerarmarch.cpp
AgeCommit message (Expand)AuthorFilesLines
2019-05-30Fixes for building the Desktop JIT in CodegenMirrorBrian Sullivan1-0/+4
2019-05-24Arm64: Take more bounds checks into consideration when inlining immediates (#...Tamar Christina1-0/+3
2019-04-16Arm64 vector ABI (#23675)Carol Eidt1-0/+6
2019-03-28Delete simple unused vars2 (#23491)Sergey Andreenko1-9/+5
2019-03-27Revert "Delete unused variables in jit. Part 2. (#23481)" (#23488)Sergey Andreenko1-5/+9
2019-03-27Delete unused variables in jit. Part 2. (#23481)Sergey Andreenko1-9/+5
2019-01-08Copy address-taken SIMD intrinsic (#21884)Carol Eidt1-1/+1
2018-11-26Fixing a few small issues with the SIMD vs SIMD HWIntrinsics (#21097)Tanner Gooding1-1/+1
2018-09-08Move FP DIV/MUL handling to genCodeForBinaryMike Danes1-0/+13
2018-08-27Deal with compilation warnings in JIT in cross-bitness scenario (#19590)Egor Chesakov1-4/+5
2018-08-07Add support to use an indirected address for JMP instructions to ARM64 (#19281)David Wrighton1-8/+0
2018-07-27Update arm64 comment for IsCallTargetInRange functionBruce Forstall1-9/+4
2018-07-26Include long shifts in OperIsShiftOrRotateCarol Eidt1-3/+2
2018-06-27Merge pull request #18130 from sdmaclea/PR-ARM64-JIT-Use-LSE-AtomicsBrian Sullivan1-1/+2
2018-06-13Fix enregistered lclFld bug (#18418)Carol Eidt1-0/+5
2018-06-07[Arm64] JIT generate LSE AtomicsSteve MacLean1-1/+2
2018-06-02Moving the getHWIntrinsicInfo and getHWIntrinsicName methods to be static met...Tanner Gooding1-2/+2
2018-06-02Moving the xarch HWIntrtinsicInfo type into its own header file.Tanner Gooding1-1/+1
2018-05-25delete unused variables from jit (#18121)Sergey Andreenko1-1/+0
2018-05-22Remove JIT LEGACY_BACKEND code (#18064)Bruce Forstall1-4/+0
2018-04-03Remove most ARM NYI (#17365)Bruce Forstall1-7/+2
2018-03-26Merge pull request #15301 from mikedn/cast-unCarol Eidt1-2/+2
2018-03-24Fix Unreachable Code warning in desktop build (#17203)Bruce Forstall1-12/+4
2018-03-20Remove arm32/arm64 dead codeBruce Forstall1-21/+5
2018-03-19Allow arm64 to contain zero in GT_STORE_LCL_FLDBruce Forstall1-0/+1
2018-03-12[Arm64] Mark removed compare zero nodes unusedSteve MacLean1-9/+11
2018-02-21LEA on rhs of block copy can't be containedCarol Eidt1-0/+5
2018-02-14[Arm64] Additional Insert commentsSteve MacLean1-1/+6
2018-02-12Insert contain extractSteve MacLean1-2/+0
2018-02-12Fix inconsistent handling of zero extending castsMike Danes1-2/+2
2018-02-09[Arm64] Implement Simd.InsertSteve MacLean1-3/+33
2018-02-01[Arm64] Add Lower Compare Zero commentsSteve MacLean1-4/+10
2018-02-01[Arm64] Lower Unsigned Compare ZeroSteve MacLean1-1/+46
2018-02-01[Arm64] Implement Simd.ExtractSteve MacLean1-2/+9
2018-01-31Delete GenTreePtr. (#16027)Sergey Andreenko1-20/+19
2018-01-26[Arm64] Initial HWIntrinsic implementationSteve MacLean1-0/+35
2017-12-08[Arm64] SIMDIntrinsicGetItem contain mem op1Steve MacLean1-2/+10
2017-11-29[Arm64] Fix UNROLL_LIMIT logicSteve MacLean1-1/+1
2017-11-14Merge pull request #14975 from sdmaclea/PR-SIMD-genSIMDIntrinsicInit-0Carol Eidt1-1/+5
2017-11-10[ARM64] SIMD genCodeForStoreLclVar zero initSteve MacLean1-0/+5
2017-11-10[ARM64] genSIMDIntrinsicInit contain 0Steve MacLean1-1/+5
2017-11-07Merge pull request #14881 from sdmaclea/PR-ARM64-SIMD-ContainCheckStoreLocBruce Forstall1-6/+0
2017-11-06[Arm64] SIMD ContainCheckStoreLocSteve MacLean1-6/+0
2017-11-03[Arm64] SIMD12 Indirect Load/StoreSteve MacLean1-0/+14
2017-11-02[Arm64] SIMDIntrinsicGetItemSteve MacLean1-1/+4
2017-10-20[Arm64] Basic SIMD loweringSteve MacLean1-0/+71
2017-10-04[Arm64] Implement GT_XADD, GT_XCHG, GT_CMPXCHG ...Steve MacLean1-0/+3
2017-10-02Move JCMP transform to LowerJTrueMike Danes1-40/+1
2017-10-02Reimplement compare flags reuse using SETCC/JCCMike Danes1-23/+1
2017-09-27[Arm64] Respond to feedbackSteve MacLean1-1/+4
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