platform/upstream/coreclr - Domain: Dotnet / Core; Licenses: MIT;

Age	Commit message (Expand)	Author	Files	Lines
2018-08-28	Replacing the IsDstSrcSrcAVXInstruction jump table with a flag.	Tanner Gooding	1	-0/+1
2018-08-28	Replacing the IsDstDstSrcAVXInstruction jump table with a flag.	Tanner Gooding	1	-0/+1
2018-08-27	Merging the instrsxarch fp, rf, and wf parameters into a single flags parameter	Tanner Gooding	1	-10/+25
2018-08-02	Get rid of x86_instrs.h	Mike Danes	1	-1/+2
2018-02-28	ARM64 SHA256 Crypto intrinsics implementation	Debayan Ghosh	1	-1/+1
2018-01-20	On all platforms first member of InstructionSet enum is InstructionSet_ILLEGAL	Jacek Blaszczynski	1	-5/+5
2018-01-19	[Arm64] Set Instruction set flags	Steve MacLean	1	-0/+23
2017-10-25	Decoupling SIMD levels from instruction sets	Fei Peng	1	-10/+6
2017-09-29	Enable hardware intrinsic in debug and reflection	Fei Peng	1	-7/+6
2017-09-29	Implement IsSuppoored for all ISA classes	Fei Peng	1	-4/+23
2017-06-09	delete DECLARE_TYPED_ENUM (#12177)	Sergey Andreenko	1	-26/+17
2016-11-28	Enable using SSE3_4 instruction set for SIMD codegen.	sivarv	1	-3/+7
2016-09-20	Support GT_OBJ for x86	Carol Eidt	1	-12/+0
2016-09-09	Do not use movsq on x86.	Pat Gavlin	1	-0/+12
2016-08-11	Reformat jit sources with clang-tidy and format	Michelle McDaniel	1	-2/+2
2016-07-29	Massage code for clang-format	Michelle McDaniel	1	-0/+2
2016-03-31	Replace uses of _WIN64 with _HOST_64BIT_.	Pat Gavlin	1	-2/+6
2016-02-29	Add support for emitting GC-ness of the second return register for 16 byte	Lubomir Litchev	1	-17/+18
2016-02-17	Refactor the Conditional branches on Arm to match the Arm condition codes	Brian Sullivan	1	-4/+0
2016-01-27	Update license headers	dotnet-bot	1	-4/+3
2015-01-30	Initial commit to populate CoreCLR repo	dotnet-bot	1	-0/+299