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path: root/src/jit/emitxarch.cpp
AgeCommit message (Expand)AuthorFilesLines
2019-06-24JIT: see if jmp offset will fit in 32 bit displacement (#25348)Andy Ayers1-1/+1
2019-06-20JIT: use register indirect for indirect jumps (#25251)Andy Ayers1-4/+4
2019-06-18Start cleaning emitxarch::GetSize estimates. (#25160)Sergey Andreenko1-3/+3
2019-05-17Ensure we don't underestimate the code size for 4 byte SSE instruction. (#24555)Tanner Gooding1-250/+258
2019-04-12Display the arm instruction sizeBruce Forstall1-2/+2
2019-04-04Improve Upper Vector Save/Restore (#23344)Carol Eidt1-0/+68
2019-03-26Handle addressing modes for HW intrinsics (#22944)Carol Eidt1-8/+29
2019-03-20Update emitter statisticsBruce Forstall1-23/+5
2019-02-08JIT: Suppress emitting same-reg zero extending move (#22454)Andy Ayers1-0/+69
2019-01-26Cleanup stackoverflow handling leftovers (#22228)Jan Kotas1-86/+0
2019-01-16 Fix imm-operand encoding for SSE/AVX instructions (#21999)Fei Peng1-8/+24
2019-01-10Merge pull request #17733 from mikedn/cc-cond2Brian Sullivan1-4/+4
2019-01-09Fix CRC32 instruction encoding on containment formFei Peng1-22/+17
2018-12-21Implement the remaining BMI1/2 intrinsic (#21480)Fei Peng1-3/+23
2018-12-14Simplifying the emitter handling of 4-byte encoded SSE instructions (#21528)Tanner Gooding1-84/+68
2018-12-10Adding support for the 2-byte VEX encoding to the emitter (#21453)Tanner Gooding1-16/+47
2018-11-27Diff-able disassembly fixes (#20863)Pent Ploompuu1-8/+12
2018-11-10Change jpe/jpo to jp/jnpMike Danes1-4/+4
2018-11-05Add support for BSWAP intrinsic (#18398)Levi Broderick1-0/+26
2018-09-07delete superpmi-shared/compileresult.cpp assert on x86. (#19841)Sergey Andreenko1-4/+4
2018-09-06Clean CodeGen::genEmitCall (#19804)Sergey Andreenko1-28/+11
2018-09-05Implement AVX2 Gather intrinsic in JITFei Peng1-2/+95
2018-08-31Implement Avx2.Permute4x64 intrinsicsJacek Blaszczynski1-0/+1
2018-08-28Replacing the IsDstSrcSrcAVXInstruction jump table with a flag.Tanner Gooding1-18/+1
2018-08-28Replacing the IsDstDstSrcAVXInstruction jump table with a flag.Tanner Gooding1-245/+1
2018-08-27Merging the instrsxarch fp, rf, and wf parameters into a single flags parameterTanner Gooding1-53/+50
2018-08-24Implement Intel AES intrinsicFei Peng1-0/+5
2018-08-24Merge pull request #19636 from jakobbotsch/fix-shift-value-executedCarol Eidt1-2/+18
2018-08-23Make clang happy and fix old commentJakob Botsch Nielsen1-0/+2
2018-08-23Mask shift value for shift [mem], constJakob Botsch Nielsen1-2/+16
2018-08-23Merge branch 'master' into fmt-bbBrian Sullivan1-0/+3
2018-08-22 Implement AVX2 MaskLoad and MaskStore (#19513)Fei Peng1-0/+3
2018-08-22define FMT_BB as "BB%02u" and use it uniformly in the codebaseBrian Sullivan1-1/+1
2018-08-09Implementing the Avx.MaskStore intrinsicsTanner Gooding1-5/+86
2018-07-27Updating emitInsCanOnlyWriteSSE2OrAVXReg to cover some of the newer instructi...Tanner Gooding1-5/+39
2018-07-20Merge pull request #19040 from CarolEidt/DiffFixCarol Eidt1-2/+2
2018-07-19JitDump improvementsCarol Eidt1-2/+2
2018-07-16Implementing the Avx2 AlignRight, Blend, and ConvertTo* hwintrinsics.Tanner Gooding1-0/+1
2018-07-11Fix VEX.vvvv encoding for AVX.BlendVariableFei Peng1-1/+5
2018-07-10Fixing encodeXmmRegAsIval to ensure the result meets the "fits in imm8" checkTanner Gooding1-2/+5
2018-07-09Implementing the ParallelBitDeposit and ParallelBitExtract Bmi2 HWIntrinsicsTanner Gooding1-1/+31
2018-07-09Implementing the AndNot, ExtractLowestSetBit, GetMaskUpToLowestSetBit, and Re...Tanner Gooding1-8/+95
2018-07-09Implementing the x86 TrailingZeroCount HWIntrinsicTanner Gooding1-1/+1
2018-06-30Move temp info from Compiler to RegSetMike Danes1-3/+3
2018-06-29Fix issue with signed/unsigned comparisonBruce Forstall1-5/+5
2018-06-11Adding containment support to more x86 HWIntrinsics (#18349)Tanner Gooding1-19/+92
2018-06-06Adding containment support for more x86 hardware intrinsics (#18297)Tanner Gooding1-54/+589
2018-06-05Fix a warning as error issue that causes a build break on the Desktop CLRBrian Sullivan1-0/+2
2018-06-04Adding function headers to the 'emitIns_SIMD_*' methods and clarifying commen...Tanner Gooding1-10/+214
2018-06-04Updating the x86 HWIntrinsics to support containment for most one-operand int...Tanner Gooding1-7/+7
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