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path: root/src/jit/codegencommon.cpp
AgeCommit message (Expand)AuthorFilesLines
2018-06-02Cleanup and remove unused parameters from genCreateAddrMode (#18258)Robin Sue1-46/+7
2018-06-02JIT: Eliminate RegTracker (#18179) (#18230)Andrew Au1-31/+30
2018-05-31[Arm64] Implement genZeroInitFltRegs for float (#18200)Steve MacLean1-2/+3
2018-05-24Typo (#18122)John Doe1-1/+1
2018-05-22Remove JIT LEGACY_BACKEND code (#18064)Bruce Forstall1-896/+120
2018-05-15Do not allocate memory in compUpdateTreeLife. (#17055)Sergey Andreenko1-328/+5
2018-04-17Unix/x64 ABI cleanupCarol Eidt1-33/+33
2018-04-04JIT: refine x86 gc reg kill set for CORINFO_HELP_INIT_PINVOKE_FRAME (#17421)Andy Ayers1-0/+5
2018-03-30Tighten arm32/arm64 write barrier kill reg setsBruce Forstall1-12/+23
2018-03-30Fix#16827 Stack probing for Linux (#17360)Egor Chesakov1-0/+57
2018-03-28Add crossbitness support to ClrJit:Egor Chesakov1-3/+4
2018-03-21Rollback Stack probing change - PR #14481Brian Sullivan1-30/+15
2018-03-19delete unused debug arg from genChangeLife and compChangeLife. (#17041)Sergey Andreenko1-8/+4
2018-03-07[RyuJIt] Clean and fix gen return (#16725)Sergey Andreenko1-0/+199
2018-03-05[ARM32] RyuJIT support for profiler ELT callbacks (#16728)Sergey Andreenko1-11/+23
2018-02-27Implement JitDefaultFillBrian Sullivan1-1/+1
2018-02-14[RyuJit] Stack level setter (#15597)Sergey Andreenko1-29/+39
2018-02-14Fix ARM/ARM64 hijacking in tail calls (#16039)Jan Vorlicek1-0/+7
2018-02-05Merge pull request #16103 from mikedn/xorpsBrian Sullivan1-9/+4
2018-01-31Delete GenTreePtr. (#16027)Sergey Andreenko1-47/+47
2018-01-30Use xorps instead of xorpdMike Danes1-9/+4
2018-01-10Fix non-Windows compile errorBruce Forstall1-6/+6
2018-01-10Fix ARM GCStress hole with byref write barrier helperBruce Forstall1-19/+142
2017-12-15Clean up clrjit from using sizeof(void*) when meant TARGET_POINTER_SIZE (#15524)Egor Chesakov1-9/+9
2017-12-08Fix typo `_TARGET_ARM` to `_TARGET_ARM_`. This happens mostly in comments exc...Egor Chesakov1-1/+1
2017-12-01Merge pull request #15270 from sdmaclea/PR-ARM64-JITSTRESS-lvaStressLclFldCBBruce Forstall1-9/+13
2017-12-01Merge pull request #15262 from sdmaclea/PR-ARM64-JITSTRESS-genEpilogRestoreRegBruce Forstall1-2/+2
2017-11-29[RyuJit] Delete contained workaround. (#15257)Sergey Andreenko1-0/+27
2017-11-29[ARM64] Align Compiler::lvaStressLclFldCB paddingSteve MacLean1-9/+13
2017-11-28[Arm64] Use REG_IP1 for genEpilogRestoreReg*Steve MacLean1-2/+2
2017-11-22[Arm64] SIMD Normalize struct arg typeSteve MacLean1-1/+1
2017-11-20Merge pull request #15133 from BruceForstall/FixMissingLabelBruce Forstall1-4/+4
2017-11-20Merge pull request #15087 from BruceForstall/FixJmpGsCheckBruce Forstall1-3/+9
2017-11-20Fix genPrepForEHCodegen for arm64Bruce Forstall1-4/+4
2017-11-20Merge pull request #14933 from sdmaclea/PR-ARM64-SIMD-Normalize-Struct-ReturnBruce Forstall1-1/+1
2017-11-17Fix RyuJIT/arm32 GS cookie check before JMP callBruce Forstall1-3/+9
2017-11-14Merge pull request #15014 from fiigii/vexencodingCarol Eidt1-2/+2
2017-11-14Change VEX-encoding selection to avoid AVX-SSE transition penaltiesFei Peng1-2/+2
2017-11-12ARMARCH: no cascaded adds in addr modeCarol Eidt1-6/+6
2017-11-10[Arm64] SIMD Normalize struct return typeSteve MacLean1-1/+1
2017-11-08Merge pull request #14861 from sdmaclea/PR-ARM64-SIMD-genFnPrologCalleeRegArgsCarol Eidt1-3/+31
2017-11-07Fix desktop retail build breakBrian Sullivan1-1/+2
2017-11-07Merge pull request #14883 from sdmaclea/PR-ARM64-SIMD-misc-varTypeIsStructCarol Eidt1-4/+1
2017-11-07[Arm64] SIMD miscellaneous varTypeIsStructSteve MacLean1-4/+1
2017-11-07[Arm64] SIMD genFnPrologCalleeRegArgsSteve MacLean1-3/+31
2017-10-28Ifdef out genMakeConstMike Danes1-0/+2
2017-10-27Merge pull request #14678 from fiigii/vexCarol Eidt1-1/+1
2017-10-25Decoupling SIMD levels from instruction setsFei Peng1-1/+1
2017-10-24Ifdef out legacy RegTracker codeMike Danes1-0/+2
2017-10-20[RyuJIT/ARM32] Fast tail call: code generation (#14445)Hyeongseok Oh1-142/+100
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