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2021-01-29Fix TPA map hash calculation. (#288)tizen_5.5_tvMikhail Kurinnoi/AI Compiler Lab /SRR/Staff Engineer/Samsung Electronics3-2/+57
* Fix TPA map hash calculation. The point of issue is "the Turkish-I Problem". After locale changed, towupper() provide another result for "i" and different hash are calculated in case if file name have "i" letter. * Regression test for #37910
2020-01-21[Tizen] Reduce arm_phdr_cb call overheadsubmit/tizen_5.5/20200207.005700accepted/tizen/5.5/unified/20200207.122745JUNG DONG-HEON3-1/+48
- Too many calls to arm_phdr_cb even though it get the same data. - It caches an ARM_CB_DATA for libcoreclr.so, then reuse.
2020-01-09Fix GC heap corruption on ARM. (#1389)submit/tizen_5.5/20200120.050447accepted/tizen/5.5/unified/20200121.031421Anton Lapounov1-1/+1
The allocate_in_free code path in allocate_in_expanded_heap incorrectly calculated the large (double) alignment padding size when limiting the plug size (SHORT_PLUGS) if set_padding_on_saved_p was true: set_padding_in_expand (old_loc, set_padding_on_saved_p, pinned_plug_entry); // Sets the padding flag on the saved plug ... pad += switch_alignment_size (is_plug_padded (old_loc)); // Reads the padding flag from the old (different!) plug That caused access violation during a later heap walk since the g_gc_pFreeObjectMethodTable pointer marking the gap was not placed at the right address. Change-Id: I10a5fa443b3f5a614909983cd3c06d5420d22858
2020-01-09[Tizen] RPM version of Tizen will be upgrade to 4.14.1.Woongsuk Cho1-4/+5
2019-12-24Change bIsFree check in DacValidateMethodTable (#1086)Dong-Heon Jung1-8/+1
Some commands of SOS validate a method table in DacValidateMethodTable. In the function, it checks whether a method table is FreeObjectMethodTable or not with GetClass() value. However, GetClass() should not be NULL. (There is an assert in GetClass()) In this patch, it compares pMT address with g_pFreeObjectMethodTable address only.
2019-12-12[Tizen] add pie linker option to createdumpWoongsuk Cho1-0/+1
2019-12-10Handle glibc sys/sysctl.h deprecation (#27048)Omair Majid1-2/+5
glibc has deprecated sys/sysctl.h: In file included from /coreclr/src/pal/src/misc/sysinfo.cpp:32: /usr/include/sys/sysctl.h:21:2: error: "The <sys/sysctl.h> header is deprecated and will be removed." [-Werror,-W#warnings] #warning "The <sys/sysctl.h> header is deprecated and will be removed." ^ 1 error generated. Fix that by preferring sysconf and only including sys/sysctl.h if HAVE_SYSCONF is not true. This mirrors the order of the implementation code in this file (sysinfo.cpp) which checks for HAVE_SYSCONF before HAVE_SYSCTL. Fixes #27008
2019-12-09[Tizen] Use -mstackrealign to sync up with Tizen build changessubmit/tizen_5.5/20191209.000009submit/tizen/20191208.235929accepted/tizen/unified/20191209.033621accepted/tizen/5.5/unified/20191209.050154Mikhail Kashkarov1-4/+6
Tizen i586 now builds with -mstackrealign by default: "Realign the stack at entry. On the x86, the -mstackrealign option generates an alternate prologue and epilogue that realigns the run-time stack if necessary. This supports mixing legacy codes that keep 4-byte stack alignment with modern codes that keep 16-byte stack alignment for SSE compatibility. ..." Change-Id: I36afd18998829f897c6b2b48687c4ae1d172b84b Signed-off-by: Mikhail Kashkarov <m.kashkarov@partner.samsung.com>
2019-12-03Enable NGEN for methods marked with AggressiveOptimization (#27259)Dong-Heon Jung1-1/+4
- Methods marked with AggressiveOptimization are not NGENed at all. - The methods are compiled during the runtime with high JITC overhead. - It makes launching time slower over 6% in our embedded systems.
2019-12-03Mark Relocation Section as NotNeeded (#25715)Dong-Heon Jung5-0/+110
- After relocation, relocation section in zap image is not necessary. - Mark the section as NotNeeded by giving advice(madvise with MADV_DONTNEED) - It reduces 120~150KB PSS in tizen sample apps.
2019-11-21[Tizen] Use PTRACE_GETREGSET for any arch when creating dumpsubmit/tizen/20191120.225954accepted/tizen/unified/20191121.073401Swift Kim1-13/+5
Also ignore ptrace NT_FPREGSET failures for arm processes on aarch64 kernels. Fixes #25707.
2019-11-19[Tizen] Add createdump to build outputsubmit/tizen/20191119.101028accepted/tizen/unified/20191120.034525Sangwook Kim1-20/+20
2019-10-15[Tizen] Add coreclr_preload_assembly to CoreCLR host APItizen_5.5.m2_releasesubmit/tizen_5.5_mobile_hotfix/20201026.185106submit/tizen_5.5/20191031.000006submit/tizen/20191014.221258accepted/tizen/unified/20191015.012049accepted/tizen/5.5/unified/mobile/hotfix/20201027.061818accepted/tizen/5.5/unified/20191031.004944Konstantin Baladurin14-162/+1064
2019-10-11[Tizen] mscorlib postscript to remove System.Private.CoreLib.dll.Backupsubmit/tizen/20191010.235421accepted/tizen/unified/20191011.080124Hyungju Lee1-0/+4
Change-Id: Ia495a61aa6495c3cf52cac167b34823ec90d3d9b
2019-10-11[Tizen] Enable Tizen ASan runtime supportVyacheslav Cherkashin2-1/+14
Enable libasansi.so support (libasan.so with switchable interceptors). Change-Id: I9ee9b47b7beab55f036ffc0697ffab2583e9701c Signed-off-by: Vyacheslav Cherkashin <v.cherkashin@samsung.com>
2019-10-11[Tizen] Implement ASan wrapper for Linux AMD64Vyacheslav Cherkashin3-0/+157
Change-Id: I48446ce7c8771a4c75149512bb7d8a8cb3fae8e5 Signed-off-by: Vyacheslav Cherkashin <v.cherkashin@samsung.com>
2019-10-11[Tizen] Implement ASan wrapper for Linux ARM32Vyacheslav Cherkashin6-0/+278
This commit implements wrappers that allow interception transitions from managed to external unmanaged code (CIL -> native) and back (native -> CIL). This allows enable/disable ASan during transitions. Due to this, we sanitize only external code, which allows us to achieve acceptable performance. Change-Id: I53ecdc14d28f7210cd9e7f5bd4db0c8ef5ed81fc Signed-off-by: Vyacheslav Cherkashin <v.cherkashin@samsung.com>
2019-10-11[Tizen] Implement detecting of sanitized librariesAndrey Drobyshev5-0/+182
Parse ".dynamic" section (ELF dynamic array tags) of the module being added, find ".rel(a).plt" section and search it for presence of '__asan_init' symbol. Change-Id: Ie7cc4c818b791b5f00713b42ba15131325b8152c Signed-off-by: Andrey Drobyshev <a.drobyshev@samsung.com>
2019-10-07Remove VolatileLoad from code already under lockFadi Hanna1-1/+1
2019-10-07Use VolaiteLoad to read counterFadi Hanna1-2/+2
2019-10-07Fix read ordering bug between buckets pointer and counterFadi Hanna1-1/+4
2019-10-07Prevent freeing of the profiler on process shutdown.David Mason1-11/+6
2019-10-07Revert "bail if profiler is terminated"David Mason1-24/+15
This reverts commit a5339ba00e94b8cd0c85b67fa66944eabc4ec7ad.
2019-10-07bail if profiler is terminatedDavid Mason1-15/+24
2019-10-07[Tizen] skip dotnet specific arguments in corerunKonstantin Baladurin1-0/+13
Now we use corerun to run corefx tests instead of dotnet, because last one isn't available for Tizen/armel. So we need to skip dotnet specific arguments, we patch corerun for it because Microsoft.DotNet.RemoteExecutor tries to execute binary that it gets from /proc/self/maps, so we need a binary that will behave like dotnet.
2019-10-07Build error fix on FEATURE_PREJIT=trueSwift Kim2-2/+2
This fix is to update usages of SetupGcCoverage() under FEATURE_PREJIT aligned to the signature change in #25261.
2019-10-04[Linux/x86] Use ebp from current context during unwinding (#26789)Konstantin Baladurin4-15/+21
pCurrentContextPointers in REGDISPLAY can contain NULLs so we need to use ebp value from pCurrentContext. This patch contains following changes: - GetRegdisplayFP returns ebp from pCurrentContext - GetRegdisplayFP is used instead of *GetEbpLocation() - Set##reg##Location also updates register value in pCurrentContext
2019-10-04[Tizen] Add unsupported tests for armKonstantin Baladurin1-0/+1
tracing/tracevalidation/tracelogging/tracelogging/tracelogging.sh see tests/issues.targets
2019-09-26[JIT/x86] Fix LinearScan::allocateRegisters (#26649)Konstantin Baladurin1-1/+1
Check for `lvLRACandidate` instead of `!lvDoNotEnregister` when checking whether `this` may be enregistered and has an Interval.
2019-09-26Linux/x86: fix build (#26594)Konstantin Baladurin2-0/+3
2019-09-26[Tizen] Pack test libs to coreclr-testGleb Balykov1-0/+1
2019-09-26[Tizen] PrecompileCommonGenerics to falseHyungju Lee1-1/+1
Change-Id: I74b3686bf0caad35c2c7519f8e4ee4d8ad0412f3
2019-09-26[Tizen] Disable missing test, which requires libhostpolicy.so to be missingGleb Balykov1-0/+1
2019-09-26[Tizen] Add unsupported tests: see tests/issues.targetsGleb Balykov1-0/+6
2019-09-26[Tizen] Replace new runtest.sh, which calls dotnet internally, with old ↵Gleb Balykov1-256/+1071
runtest.sh
2019-09-26[Tizen] Partially revert a6292a6.Mikhail Kurinnoi1-0/+39
NetcoreDBG depends from PAL functions. Instead of SOS plugin, that use PAL static libs, debugger should be able to operate with any runtime version and can't be statically linked to PAL.
2019-09-26[Tizen] Update openssl-64bit version to 1.1Hyungju Lee1-1/+1
Change-Id: Icc69aa049a77c3adb961b00571765905d3494c70
2019-09-26[Tizen] Enable IBCLoggerHyungju Lee1-1/+1
Change-Id: I39f7a8c07d7760493d2aae08750abce6139103c4
2019-09-26add access(2) call before dlopening filesYaroslav Yamshchikov1-0/+9
2019-09-26[Tizen] Precompile frequently used generic methods.Kirill Frolov3-0/+48
2019-09-26corbbtprof: set byte alignment for CORBBTPROF structures (#25816)Konstantin Baladurin1-0/+5
Fix patch fixes SIGBUG that occurs due to unaligned read/write
2019-09-26Fail to explicitly tail call on x86 unix. (#25032)Jarret Shook3-2/+55
* Fail to explicitly tail call on x86 unix. * Correctly return 100 * Correct return value * Add noway assert in morphTailCall to avoid morphing slow tail calls on unix. * Address feedback
2019-09-26[Tizen] Disable jithost arena cacheGleb Balykov1-1/+1
2019-09-26[Tizen] Disable IBC Logger as a defaultDongHeon Jung2-1/+5
- Profile information is collected by ibc logger. Hower it is not used and saved into profile file. - The patch disables IBC logger which is enabled by default. - It disables IBC logger only with ibclogger.h file. IBCLOGGER_ENABLED definition is only used in ibclogger files.
2019-09-26Fix a build error when IBCLOGGER_ENABLED is not defined (#25691)Dong-Heon Jung1-13/+31
- Even if DACCESS_COMPILE or CROSSGEN_COMPILE is defined, coreclr can be built without IBCLOGGER_ENABLED definition.
2019-09-26[Tizen] Define -DHAS_ADDRESS_SANITIZER for ASan buildSlava Barinov1-3/+6
This define turns on new and delete operators compatibility mode for build with Address Sanitizer. It allows Tizen libasan to intercept operators and prevents alloc-dealloc-mismatch errors. Change-Id: If72b1d42dd99eaaf11d3cb1232006ee0e2e411c3 Signed-off-by: Slava Barinov <v.barinov@samsung.com>
2019-09-26[Tizen] Remove -DFEATURE_GDBJIT=TRUE from spec fileHyungju Lee1-2/+2
Change-Id: Ic0b8bfc8ab45284ecda5ab99e683224368e607f5
2019-09-26[Tizen] Update Openssl version 1.0 to 1.1Hyungju Lee1-1/+1
Change-Id: Id37364dd5dec17ab5a7b60e14df78a4967b3f3b8
2019-09-26[Tizen] Enable PGO for Linux/armKonstantin Baladurin4-4/+27
2019-09-24[Tizen] seperate PIC and PIE to fix x86_64 build errorWoongsuk Cho1-3/+5
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