AgeCommit message (Collapse)AuthorFilesLines
2018-07-27[Tizen] Add crossgen and coreconsole to coreclr packagesubmit/tizen_base/20180802.004115submit/tizen_base/20180731.144318submit/tizen_base/20180727.111904submit/tizen_base/20180727.102430accepted/tizen/base/20180803.172528accepted/tizen/base/20180727.152042junghyuk.park1-2/+6
- The coreclr-extra package is going to be eliminated soon. - Symlinks to crossgen and coreconsole are created temporarily for graceful migration
2018-07-27Zapper::CompileAssembly: save NI file atomicallyKonstantin Baladurin3-4/+13
It can get rid of possible problems with corrupted NI files if crossgen will be killed during image saving.
2018-07-23Fix call convension for profiler wrappers.Dmitri Botcharnikov1-3/+3
Change-Id: I7937dfffeb7500d37b4e2da485a563a442b38b8c
2018-07-13[Tizen] Provide symlinks to .NET version for compatibilitysubmit/tizen_base/20180730.085009submit/tizen_base/20180713.001002accepted/tizen/base/20180730.092532accepted/tizen/base/20180713.194704junghyuk.park1-0/+8
This commit will be reverted soon when all dependent modules watch the symlink at '/usr/share/dotnet.tizen/netcoreapp'. Change-Id: Ib2ebf62a5788e225a9e3354f53fadde282708700
2018-07-10[Tizen] Update version: 2.1.0 -> 2.1.1Gleb Balykov1-2/+2
2018-07-09i386: Refixed declaration in eetoprofinterfaceimpl.cpp with definitionSergey Ignatov3-9/+9
2018-07-09i386: Fixed declaration in eetoprofinterfaceimpl.cpp with definitionSergey Ignatov1-3/+3
2018-07-09Revert "Launching the Memory Profiler on x86 emulator may lead to crash in ↵Sergey Ignatov2-7/+0
coreclr (xmm bug)" This reverts commit a6695d168396847df8d006a8743c84e5141824af.
2018-07-09[Tizen] Add skipped testcase: superpmiHyeongseok Oh1-0/+1
Skip JIT/superpmi/superpmicollect/
2018-07-09[Tizen] Add skipped testcase on TM1Jiyoung Yun1-1/+5
Lists: JIT.jit64.opt.cse.hugeSimpleExpr1.hugeSimpleExpr1 GC.Regressions.v2.0-rtm.494226.494226.494226 GC.Scenarios.ServerModel.servermodel.servermodel JIT.jit64.opt.cse.HugeField1.HugeField1 JIT.jit64.opt.cse.HugeField2.HugeField2 JIT.jit64.opt.cse.hugeexpr1.hugeexpr1
2018-07-06PEImageLayout: flush instruction cache only for pages with relocs.Konstantin Baladurin1-17/+29
We need to flush instruction cache only for pages that have relocations instead of full sections because otherwise application's shared clean memory is increased in some cases on Linux.
2018-07-06Launching the Memory Profiler on x86 emulator may lead to crash in coreclr ↵Sergey Ignatov2-0/+7
(xmm bug)
2018-07-06Fix unset ZapRelocationType for fixup (#18589)Gleb Balykov1-1/+1
2018-07-06Fix build breaks with older MSVC compiler (#18725)Jan Kotas1-1/+2
2018-07-06Add FEATURE_NGEN_RELOCS_OPTIMIZATIONS=true as default value for Unix ARMGleb Balykov1-0/+3
2018-07-06Remove relocations for vtable chunks (#17147)Gleb Balykov23-109/+466
* Separate sections READONLY_VCHUNKS and READONLY_DICTIONARY * Remove relocations for second-level indirection of Vtable in case FEATURE_NGEN_RELOCS_OPTIMIZATIONS is enabled. Introduce FEATURE_NGEN_RELOCS_OPTIMIZATIONS, under which NGEN specific relocations optimizations are enabled * Replace push/pop of R11 in stubs with - str/ldr of R4 in space reserved in epilog for non-tail calls - usage of R4 with hybrid-tail calls (same as for EmitShuffleThunk) * Replace push/pop of R11 for function epilog with usage of LR as helper register right before its restore from stack
2018-07-06[x86/Linux] Fix marshalling struct with 64-bit types (#17455)Konstantin Baladurin6-35/+120
* [x86/Linux] Fix marshalling struct with 64-bit types The System V ABI for i386 defines 4-byte alignment for 64-bit types. * [Linux/x86] Fix marshalling tests in the case of System V i386 ABI
2018-07-06[Linux/x86] Fix tests in case of 4-byte alignment for 64-bit types (#17829)Konstantin Baladurin3-5/+17
JIT/Directed/RVAInit/nested JIT/Directed/RVAInit/simple JIT/Regression/CLR-x86-JIT/V1.2-Beta1/b103058/b103058
2018-07-06Fix OOPStackUnwinderX86::Unwind crash when Eip is invalidIgor Kulaychuk1-1/+1
2018-07-06Fix EECodeManager::GetAmbientSP on x86/LinuxIgor Kulaychuk1-1/+2
2018-07-06Fix unwinding of funclet with no epilog on x86/LinuxIgor Kulaychuk1-14/+5
2018-07-06Fix x86/Linux ICorDebug frames APIIgor Kulaychuk2-17/+17
2018-07-05[Tizen] Provide a symlink to installed Microsoft.NETCore.App versionjunghyuk.park1-0/+3
The symlink is added to provide consistent access to installed Microsoft.NETCore.App version. '/usr/share/dotnet.tizen/netcoreapp' is linked to '/usr/share/dotnet/shared/Microsoft.NETCore.App/2.1.0'.
2018-07-04[Tizen] Add -pie to linker optionHyungju Lee1-0/+1
There have been no -pie linker option. This patch adds -pie linker option into crossgen(for tizen) This originates from 0024-Add-pie-to-linker-option.patch
2018-07-04[Tizen] Enable -O3 optimization in clang 3.8junghyuk.park1-2/+2
2018-07-04[Tizen] Add support for GBSjunghyuk.park5-0/+326
2018-07-04[Tizen] Add BuildTools 2.1.0-rc1-02804-05junghyuk.park14201-0/+9917387
2018-07-04[Tizen] Add prebuilt libicu-57.1 librariesjunghyuk.park48-0/+29
2018-06-04Update PgoData to release-20180604-0043 (#18275)dotnet-maestro-bot1-2/+2
2018-06-03Update PgoData to release-20180603-0040 (#18265)dotnet-maestro-bot1-2/+2
2018-06-02Update PgoData to release-20180602-0037 (#18250)dotnet-maestro-bot1-2/+2
2018-06-01Fix alternate stack for Alpine docker on SELinux (#17936) (#17975)kasper31-12/+6
For some reason, the Alpine docker container running on a SELinux host maps heap as RWX. When we allocate alternate stack from the heap, we also change the protection of the first page to PROT_NONE so that it can serve as a guard page to catch stack overflow. And when we free the alternate stack, we restore the protection back to PROT_READ | PROT_WRITE. The restoration fails in Alpine docker container running on a SELinux host with EPROT failure and the SELinux log reports that an attempt to change heap to executable was made. So it looks like the kernel has added the PERM_EXEC to the permissions we have passed to the mprotect call. There is a code in the mprotect implementation that can do that, although I don't fully understand the conditions under which it happens. This is driven by the VM_MAYEXEC flag in the internal VMA block structure. To fix that, I've modified the alternate stack allocation to use mmap / munmap instead of C heap allocation.
2018-05-31Update g_highest_address and g_lowest_address in ↵Egor Chesakov1-1/+8
StompWriteBarrier(WriteBarrierOp::StompResize) on ARM (#18107)
2018-05-31Use sysconf(_SC_NPROCESSORS_CONF) instead of sysconf(_SC_NPROCESSORS_ONLN) ↵Egor Chesakov2-3/+17
in PAL and GC on ARM and ARM64
2018-05-31Update PgoData to release-20180531-0037 (#18214)dotnet-maestro-bot1-2/+2
2018-05-30Update PgoData to release-20180530-0051 (#18194)dotnet-maestro-bot1-2/+2
2018-05-29Update branding to 2.1.1 (#18161)Matt Mitchell1-2/+2
2018-05-29Merge pull request #17998 from dotnet-maestro-bot/release/2.1-UpdateDependenciesWes Haggard2-9/+9
Update CoreClr, CoreFx, PgoData to rtm-26515-07, rtm, release-20180529-0037, respectively (release/2.1)
2018-05-29Update dependencies to rtmWes Haggard1-3/+3
2018-05-29Update CoreClr, CoreFx, PgoData to rtm-26515-07, rtm, release-20180529-0037, ↵dotnet-maestro-bot2-8/+8
2018-05-14Update CoreClr, CoreFx, PgoData to rtm-26514-02, rtm-26514-02, ↵dotnet-maestro-bot2-8/+8
release-20180514-0049, respectively (#17987)
2018-05-11Merge pull request #17965 from jashook/port_build_test_sh_changesJarret Shook2-59/+93
Port changes from master to release/2.1
2018-05-11Split unix test builds in slices (#17785)Steve MacLean2-45/+88
* Split unix test builds in slices Ports #17161 to linux * Address review feedback
2018-05-11Merge pull request #17725 from dotnetrt/FixNixTestBuildJarret Shook2-15/+6
Fix unix test build by removing unnecessary 'managed_test_build' semafore file
2018-05-09Update CoreClr, CoreFx to rtm-26508-04, rtm-26508-03, respectively (#17927)dotnet-maestro-bot2-6/+6
2018-05-07Update CoreClr, CoreFx to rtm-26505-03, rtm-26505-03, respectively (#17892)dotnet-maestro-bot2-6/+6
2018-05-04Update BuildTools to rc1-02804-05 (#17885)dotnet-maestro-bot2-3/+3
2018-05-04Fix for ARM secure delegate non-standard register argBruce Forstall2-9/+34
For ARM, doing a secure delegate call requires adding a custom calling convention argument R4 as the address of the secure delegate invoke indirection cell. This is done using the fgMorphArgs nonStandardArgs mechanism, and the argument is added at the end. For calls with 4 or more register arguments, this didn't work: we would initially set the non-standard arg as a non-register argument, and the nonStandardArgs check didn't consider converting an argument from a stack argument back to a register argument. The fix allows nonStandardArgs to be either stack or register arguments, no matter what their place in the argument list would imply. Fixes #17738
2018-05-04Update CoreClr, CoreFx to rtm-26504-02, rtm-26504-02, respectively (#17883)dotnet-maestro-bot2-6/+6
2018-05-04Update BuildTools, CoreClr, CoreFx to rc1-02803-01, rtm-26502-03, ↵dotnet-maestro-bot3-9/+9
rtm-26502-02, respectively (#17874)