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2021-01-15Fix memory leaked caused by Marshal.GetFunctionPointerForDelegate (#28074)submit/tizen_6.0/20210115.013248submit/tizen/20210115.013305accepted/tizen/unified/20210115.125752accepted/tizen/6.0/unified/20210115.041837tizen_6.0accepted/tizen_6.0_unifiedAaron Robinson2-16/+7
2020-12-01r0InUse should be true for SoftFP in CodeGen::genProfilingLeaveCallback in ↵submit/tizen_6.0_hotfix/20201201.072132submit/tizen_6.0/20201201.072121submit/tizen/20201201.072115accepted/tizen/unified/20201202.124951accepted/tizen/6.0/unified/20201202.212218이형주/Common Platform Lab(SR)/Staff Engineer/삼성전자1-1/+1
src/jit/codegenarm.cpp (#321)
2020-10-29Remove --arch option from runtest.shTimur2-20/+9
Signed-off-by: Timur <t-mustafin@partner.samsung.com>
2020-10-05[Tizen] Add RelativeStubPrecode for arm64, which replaces StubPrecode in FNV ↵Gleb Balykov8-19/+276
images
2020-10-05[Tizen] Add method to write coredump of .NET process (#317)tizen_6.0.m2_releasesubmit/tizen_6.0_hotfix/20201103.115101submit/tizen_6.0_hotfix/20201102.192901submit/tizen_6.0/20201029.205501submit/tizen/20201005.013439accepted/tizen/unified/20201005.101320accepted/tizen/6.0/unified/hotfix/20201102.235357accepted/tizen/6.0/unified/20201030.104646accepted/tizen_6.0_unified_hotfixMateusz Moscicki/System (PLT) /SRPOL/Engineer/Samsung Electronics3-26/+65
This method allows to create minimal coredump (as createdump does) of a process that is in dumping state after crash.
2020-10-05fix dwarf-based unwinding to the end of stackYaroslav Yamshchikov1-1/+1
We experience CLR crash on some architectures (at least on x86) in case of unhandled managed exception. libunwind steps to the very end of a stack, and if .eh_frame info is correct, it returns with retcode 0 and ip=0 from unw_step, then PAL calls unw_is_signal_frame with c->validate==0 which in turn dereferences zeroed ip in access_mem. libunwind spec says that retcode 0 from unw_step means very end of a stack, so PAL should not expect any frames, signal or not. It should convert cursor back to SEH representation and return with TRUE. corresponding PR to dotnet/runtime on upstream: https://github.com/dotnet/runtime/pull/42620
2020-10-05Revert "[Tizen] Fix crash on accessing 0x0 while unwinding (#287)"Yaroslav Yamshchikov1-3/+1
This reverts commit c4a72f57bee753daf09ffbc2a2dfe65ed1582919.
2020-09-21[Tizen] Add RelativeFixupPrecode for arm64, which replaces FixupPrecode in ↵submit/tizen/20200921.230336accepted/tizen/unified/20200922.034817Gleb Balykov13-47/+537
FNV images
2020-08-25Build tests in gbs for x86/x64 (#307)submit/tizen/20200901.065247accepted/tizen/unified/20200907.144049Gleb Balykov/Platform Lab /SRR/Engineer/Samsung Electronics106-28/+133579
* Add -msse2 compile option Cherry-pick of https://github.com/dotnet/runtime/pull/33135 * Use prefixed hex format in asm Cherry-pick of https://github.com/dotnet/runtime/pull/33205 * [Tizen] Add CoreCLR tests build dependencies v3.1.3 for x86 * [Tizen] Add CoreCLR tests build dependencies v3.1.3 for x64 * [Tizen] Allow build of tests for x86/x64
2020-08-10Fix buffer overrun in JIT for Vector256<T> types on ARM64. (#35864) (#308)submit/tizen/20200811.004222accepted/tizen/unified/20200811.050456Timur Mustafin/Platform Lab /SRR/Engineer/Samsung Electronics2-4/+4
Stop recognizing Vector256<T> types as intrinsic for ARM64 in Crossgen2. Signed-off-by: Timur <t-mustafin@partner.samsung.com>
2020-07-27Implement genProfilingEnterCallback genProfilingLeaveCallback on Arm64 ↵submit/tizen/20200731.014213accepted/tizen/unified/20200731.145700Mikhail Kurinnoi16-673/+1171
(dotnet/coreclr#26460) * Split genProfilingEnterCallback and genProfilingLeaveCallback into architecture specific versions * Remove redundant genStackLevel save/restore logic on Arm, Arm64, Amd64 * Implement JIT_ProfilerEnterLeaveTailcallStub in assembly * Define RBM_PROFILER_{ENTER,LEAVE,TAILCALL}_TRASH for TARGET_ARM64 * Define REG_PROFILER_{ENTER,LEAVE}_ARG_FUNC_ID and RBM_PROFILER_{ENTER,LEAVE}_ARG_CALLER_SP * Simplify r0Trashed logic in src/jit/codegenarm.cpp * Remove wrong comment in src/jit/codegenarm.cpp * On Arm genPrologPadForReJit does nothing so remove it in src/jit/codegenarm.cpp * Implement LinearScan::BuildNode for GT_PROF_HOOK and GT_RETURN in src/jit/lsraarm64.cpp * Shouldn't a call to CORINFO_HELP_PROF_FCN_TAILCALL be marked as a No-GC? * Implement genProfilingEnterCallback genProfilingLeaveCallback in src/jit/codegenarm64.cpp * Implement NYI profiler methods in src/vm/arm64/profiler.cpp * Implement ProfileEnterNaked ProfileLeaveNaked ProfileTailcallNaked in src/vm/arm64/asmhelpers.S * Implement profiler helpers on win-arm64 * Remove logic for !FINAL_FRAME_LAYOUT in codegenarm64.cpp * Remove unused macro in src\jit\target.h * genProfilingLeaveCallback ignores helper on arm in src\jit\codegenarm.cpp * Refactor genProfilingLeaveCallback in src\jit\codegenarm.cpp Commit migrated from https://github.com/dotnet/coreclr/commit/d88bc184d054fe8e4915964330ca65378d59ef27
2020-07-24[Tizen] Fix unsupportedCrossgenLibs.arm64 (#304)submit/tizen/20200723.225658accepted/tizen/unified/20200724.124146Timur Mustafin/AI Compiler Lab /SRR/Engineer/Samsung Electronics1-0/+3
Signed-off-by: Timur <t.mustafin@partner.samsung.com>
2020-07-23[Tizen] Add skips for arm64Timur3-0/+212
Signed-off-by: Timur <t.mustafin@partner.samsung.com>
2020-07-23[Tizen] Disable default build of testsGleb Balykov1-1/+1
To build tests for armel/arm64 add: --define 'skiptests 0'
2020-07-23[Tizen] Do not pack debug dllsGleb Balykov1-0/+2
This is required to workaround rpmbuild issue (rpmbuild tries to get debug symbols from these dlls)
2020-07-23[Tizen] Disable default non-portable build for armelGleb Balykov1-7/+1
This is required for portable build of managed part of tests. To cross build CLR for tizen use -portablebuild=false.
2020-07-23[Tizen] Add skipgeneratelayout option to skip generation of corerootGleb Balykov1-1/+9
2020-07-23[Tizen] Set obj dir to be TargetRid specificGleb Balykov87-102/+102
This allows to perform build for different arches in the same repository
2020-07-23[Tizen] Add skiprestore option to skip restore of packagesGleb Balykov1-0/+6
Partial cherry-pick of https://github.com/dotnet/coreclr/pull/27633
2020-07-23[Tizen] Add flag skipstressdependencies to skip build of x64 specific .so ↵Gleb Balykov1-7/+15
for stress testing
2020-07-23[Tizen] Do not access crossgen if it is not neededGleb Balykov1-1/+1
2020-07-23[Tizen] Fix issue with return from non-sourced script if tools are already ↵Gleb Balykov1-1/+7
initialized
2020-07-23[Tizen] Build CoreCLR tests in specGleb Balykov2-11/+80
2020-07-23[Tizen] Add skips for armelGleb Balykov3-0/+348
2020-07-23[Tizen] Fix clang version passingGleb Balykov1-1/+1
2020-07-23[Tizen] Add updated scripts to run testsGleb Balykov2-778/+287
- CLRTest.CrossGen.targets is used as a template for crossgen part of individual test script - runtest.sh is used for launching tests
2020-07-23[Tizen] Add CoreCLR tests build dependencies v3.1.3 for armel, arm64Gleb Balykov100-0/+133254
2020-07-23[Tizen] Add CoreCLR tests BuildTools v3.1.3 for armel,arm64Gleb Balykov22150-0/+15075378
2020-07-13[Tizen] Enable relocations optimizations for Tizen arm64submit/tizen/20200714.001703accepted/tizen/unified/20200714.065733Gleb Balykov1-1/+1
2020-07-13[Tizen] Update CreateDictionaryLookupHelper on arm64 to support relative ↵Gleb Balykov1-22/+75
indirection
2020-07-13[Tizen] Support relative indirection for 1st and 2nd levels of vtable on arm64Gleb Balykov3-53/+90
2020-07-13[Tizen] Add clang8/9/10 build support (#295)Gleb Balykov/AI Compiler Lab /SRR/Engineer/Samsung Electronics2-0/+35
2020-07-03[Tizen] Unify dnetmemoryenumlib terms to match the codebase (#291)submit/tizen_5.5_wearable_hotfix/20201026.184306submit/tizen_5.5/20200729.021615submit/tizen_5.5/20200629.221218submit/tizen/20200703.012556accepted/tizen/unified/20200703.155115accepted/tizen/5.5/unified/wearable/hotfix/20201027.101953accepted/tizen/5.5/unified/20200729.230651accepted/tizen_5.5_unifiedMateusz Moscicki/System (PLT) /SRPOL/Engineer/Samsung Electronics2-20/+40
2020-06-30[Tizen] Fix cross build arm64 rootfs creation (#284)submit/tizen/20200629.221257accepted/tizen/unified/20200630.131323Gleb Balykov/AI Compiler Lab /SRR/Engineer/Samsung Electronics4-4/+6
2020-06-30[Tizen] Fix crash on accessing 0x0 while unwinding (#287)이형주/Common Platform Lab(SR)/Staff Engineer/삼성전자1-1/+3
Change-Id: I663d0fcdcd6fd8fb4c521d9bdbb4d234c96022ae
2020-06-26Fix a FNV error on arm64 (#286)정동헌/Common Platform Lab(SR)/Principal Engineer/삼성전자1-0/+2
Simple HelloWorld app can run with NI of System.Private.CoreLib.dll, HelloWorld.dll and System.Console.dll
2020-06-26Fix TPA map hash calculation. (#288)Mikhail Kurinnoi/AI Compiler Lab /SRR/Staff Engineer/Samsung Electronics3-2/+57
* Fix TPA map hash calculation. The point of issue is "the Turkish-I Problem". After locale changed, towupper() provide another result for "i" and different hash are calculated in case if file name have "i" letter. * Regression test for #37910
2020-06-24[Tizen] Pass compilation flags to asm files (#285)Gleb Balykov/AI Compiler Lab /SRR/Engineer/Samsung Electronics1-0/+1
2020-06-23[Tizen] Force Inline for Generic Methods (#224)submit/tizen/20200622.225420accepted/tizen/unified/20200623.124116정동헌/Common Platform Lab(SR)/Principal Engineer/삼성전자3-2/+17
This patch enables more generic method inlining for methods which are not compiled by NI.
2020-06-18Fix missing TransitionBlock methods (#33134)submit/tizen_5.5/20200623.003918accepted/tizen/5.5/unified/20200623.152349JUNG DONG-HEON1-3/+0
2020-06-18[Tizen] Add arm64 rootfs build scriptGleb Balykov8-4/+444
2020-06-18[Tizen] Enable aarch64 gbs buildGleb Balykov2-6/+8
2020-06-18[Tizen] Add tizen arm64 toolchain file. Explicitly pass non-portable build ↵Gleb Balykov3-15/+57
to fix arm64 build on tizen (on armel non-portable build is default, tizen rid in general is non-portable).
2020-06-18Add JIT/Stress/ABI TestsJUNG DONG-HEON16-0/+1832
Cherrypick only test parts of below patches in public dotnet/runtime github - be8e050a6d27040d6c249382d99d57d973e919b2 Implement instantiating and unboxing through portable stublinker code… (#106) - 0e949491faee53d2a7ad4d5649be17e98e5d3a96 Some minor ABI stress improvements - 3f339687a8151e989bbb4673aab9b0abcddf5642 Mark emitted types assembly as collectible in ABI stress (dotnet/coreclr#26253) - a25dd1a45b6fdad114ffaa915550906c986aa1ca Remove redundant ABI stress tests (dotnet/coreclr#26183) - 57945676a6395da61b61ce427a055e77d330db86 Fix GenerateShuffleArray to support cyclic shuffles (dotnet/coreclr#26169) - 3b0ba1ee24823030a3fc7278dd064d24a49a90bb Add ABI stress tests (dotnet/coreclr#26090)
2020-06-18Implement instantiating and unboxing through portable stublinker code… (#106)JUNG DONG-HEON43-2407/+761
* Implement instantiating and unboxing through portable stublinker code - Handle only the cases with register to register moves - Shares abi processing logic with delegate shuffle thunk creation - Architecture specific logic is relatively simple - Do not permit use of HELPERREG in computed instantiating stubs - Fix GetArgLoc such that it works on all architectures and OS combinations Add a JIT stress test case for testing all of the various combinations - Use the same calling convention test architecture that was used as part of tail call work Rename secure delegates to wrapper delegates - Secure delegates are no longer a feature of the runtime - But the wrapper delegate lives on as a workaround for a weird detail of the ARM32 abi
2020-06-18Fix GenerateShuffleArray to support cyclic shuffles (dotnet/coreclr#26169)JUNG DONG-HEON4-20/+182
* Fix GenerateShuffleArray to support cyclic shuffles The GenerateShuffleArray was not handling case when there was a cycle in the register / stack slots shuffle and it resulted in an infinite loop in this function. This issue is Unix Amd64 ABI specific. To fix that, this change reworks the algorithm completely. Besides fixing the issue, it has also better performance in some cases. To fix the cyclic shuffling, I needed an extra helper register. However, there was no available general purpose register available, so I had to use xmm8 for this purpose. * Remove special handling of the hang from ABI stress
2020-06-05[x86/Linux] Fix SIGSEGV during evaluation abort routine.submit/tizen_5.5/20200607.233848submit/tizen/20200607.233857accepted/tizen/unified/20200608.144754accepted/tizen/5.5/unified/20200608.142150Mikhail Kurinnoi1-1/+16
In case of evaluation with implicit function call aborted by ```ICorDebugEval::Abort()```, CoreCLR crash with SIGSEGV at line https://github.com/dotnet/runtime/blob/e25517ea27311297c1e3946acb3b4382d5fa7fef/src/coreclr/src/vm/jitinterface.cpp#L14293 since ```m_pJM``` is ```NULL```. This happens because during ```EECodeInfo::Init()``` call, ```codeAddress``` parameter provide address inside native code region (this address belong to CallDescrWorkerInternal(), libcoreclr.so), but not address inside managed code, so, ```ExecutionManager::FindCodeRange()``` can't find appropriate ```RangeSection```. During investigation I found, that at line https://github.com/dotnet/runtime/blob/e25517ea27311297c1e3946acb3b4382d5fa7fef/src/coreclr/src/vm/stackwalk.cpp#L2584 current context was not changed properly (we have wrong ```Eip``` register value). I found, that ```FuncEvalFrame::UpdateRegDisplay()``` code https://github.com/dotnet/runtime/blob/e25517ea27311297c1e3946acb3b4382d5fa7fef/src/coreclr/src/debug/ee/debugger.inl#L238-L247 don't have x86/Linux support implemented. I propose changes, that were already made for other ```UpdateRegDisplay()``` implementations in order to provide proper context for x86/Linux.
2020-06-04[Tizen] Enable ASan annotation of passing to native code buffersAndrey Kazmin2-3/+47
Turn on ASan inteceptors while marshaling managed buffers to native code. We could not properly annotate already allocated on heap buffers, so we have to disable pinning of such objects. Current patch affects only pinning of native arrays.
2020-05-27[Tizen] Cleanup confusing symlinkssubmit/tizen_5.5/20200529.025744submit/tizen/20200529.025703accepted/tizen/unified/20200601.051718accepted/tizen/5.5/unified/20200601.002556Hyungju Lee1-11/+0
Change-Id: I032c9ff1e0f43e39d0d05a38eb95dabe2f1b6b25
2020-05-25Update package version to 3.1.3Alexander Soldatov/AI Compiler Lab /SRR/Staff Engineer/Samsung Electronics1-2/+2