diff options
Diffstat (limited to 'src/jit/target.h')
| -rw-r--r-- | src/jit/target.h | 51 |
1 files changed, 26 insertions, 25 deletions
diff --git a/src/jit/target.h b/src/jit/target.h index 5b608ddfac..f62d90519b 100644 --- a/src/jit/target.h +++ b/src/jit/target.h @@ -6,25 +6,11 @@ #ifndef _TARGET_H_ #define _TARGET_H_ -// If the UNIX_AMD64_ABI is defined make sure that _TARGET_AMD64_ is also defined. -#if defined(UNIX_AMD64_ABI) -#if !defined(_TARGET_AMD64_) -#error When UNIX_AMD64_ABI is defined you must define _TARGET_AMD64_ defined as well. -#endif -#endif - -// If the UNIX_X86_ABI is defined make sure that _TARGET_X86_ is also defined. -#if defined(UNIX_X86_ABI) -#if !defined(_TARGET_X86_) -#error When UNIX_X86_ABI is defined you must define _TARGET_X86_ defined as well. -#endif -#endif - -#if (defined(FEATURE_CORECLR) && defined(PLATFORM_UNIX)) +#if defined(FEATURE_CORECLR) && defined(_TARGET_UNIX_) #define FEATURE_VARARG 0 -#else // !(defined(FEATURE_CORECLR) && defined(PLATFORM_UNIX)) +#else // !(defined(FEATURE_CORECLR) && defined(_TARGET_UNIX_)) #define FEATURE_VARARG 1 -#endif // !(defined(FEATURE_CORECLR) && defined(PLATFORM_UNIX)) +#endif // !(defined(FEATURE_CORECLR) && defined(_TARGET_UNIX_)) /*****************************************************************************/ // The following are human readable names for the target architectures @@ -1080,10 +1066,10 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits #define REG_ARG_4 REG_R8 #define REG_ARG_5 REG_R9 - SELECTANY const regNumber intArgRegs[] = { REG_EDI, REG_ESI, REG_EDX, REG_ECX, REG_R8, REG_R9 }; - SELECTANY const regMaskTP intArgMasks[] = { REG_EDI, REG_ESI, REG_EDX, REG_ECX, REG_R8, REG_R9 }; - SELECTANY const regNumber fltArgRegs[] = { REG_XMM0, REG_XMM1, REG_XMM2, REG_XMM3, REG_XMM4, REG_XMM5, REG_XMM6, REG_XMM7 }; - SELECTANY const regMaskTP fltArgMasks[] = { REG_XMM0, REG_XMM1, REG_XMM2, REG_XMM3, REG_XMM4, REG_XMM5, REG_XMM6, REG_XMM7 }; + SELECTANY const regNumber intArgRegs [] = { REG_EDI, REG_ESI, REG_EDX, REG_ECX, REG_R8, REG_R9 }; + SELECTANY const regMaskTP intArgMasks[] = { RBM_EDI, RBM_ESI, RBM_EDX, RBM_ECX, RBM_R8, RBM_R9 }; + SELECTANY const regNumber fltArgRegs [] = { REG_XMM0, REG_XMM1, REG_XMM2, REG_XMM3, REG_XMM4, REG_XMM5, REG_XMM6, REG_XMM7 }; + SELECTANY const regMaskTP fltArgMasks[] = { RBM_XMM0, RBM_XMM1, RBM_XMM2, RBM_XMM3, RBM_XMM4, RBM_XMM5, RBM_XMM6, RBM_XMM7 }; #define RBM_ARG_0 RBM_RDI #define RBM_ARG_1 RBM_RSI @@ -1103,9 +1089,9 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits #define REG_ARG_2 REG_R8 #define REG_ARG_3 REG_R9 - SELECTANY const regNumber intArgRegs[] = { REG_ECX, REG_EDX, REG_R8, REG_R9 }; + SELECTANY const regNumber intArgRegs [] = { REG_ECX, REG_EDX, REG_R8, REG_R9 }; SELECTANY const regMaskTP intArgMasks[] = { RBM_ECX, RBM_EDX, RBM_R8, RBM_R9 }; - SELECTANY const regNumber fltArgRegs[] = { REG_XMM0, REG_XMM1, REG_XMM2, REG_XMM3 }; + SELECTANY const regNumber fltArgRegs [] = { REG_XMM0, REG_XMM1, REG_XMM2, REG_XMM3 }; SELECTANY const regMaskTP fltArgMasks[] = { RBM_XMM0, RBM_XMM1, RBM_XMM2, RBM_XMM3 }; #define RBM_ARG_0 RBM_ECX @@ -1182,7 +1168,11 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits // TODO-ARM-CQ: Check for sdiv/udiv at runtime and generate it if available #define USE_HELPERS_FOR_INT_DIV 1 // BeagleBoard (ARMv7A) doesn't support SDIV/UDIV #define CPU_LOAD_STORE_ARCH 1 +#ifdef LEGACY_BACKEND #define CPU_LONG_USES_REGPAIR 1 +#else + #define CPU_LONG_USES_REGPAIR 0 +#endif #define CPU_HAS_FP_SUPPORT 1 #define ROUND_FLOAT 0 // Do not round intermed float expression results #define CPU_HAS_BYTE_REGS 0 @@ -1242,7 +1232,11 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits #define RBM_CALLEE_SAVED (RBM_INT_CALLEE_SAVED | RBM_FLT_CALLEE_SAVED) #define RBM_CALLEE_TRASH (RBM_INT_CALLEE_TRASH | RBM_FLT_CALLEE_TRASH) +#ifdef LEGACY_BACKEND #define RBM_CALLEE_TRASH_NOGC (RBM_R2|RBM_R3|RBM_LR) +#else + #define RBM_CALLEE_TRASH_NOGC RBM_CALLEE_TRASH +#endif #define REG_DEFAULT_HELPER_CALL_TARGET REG_R12 #define RBM_ALLINT (RBM_INT_CALLEE_SAVED | RBM_INT_CALLEE_TRASH) @@ -1382,6 +1376,10 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits #define RBM_VIRTUAL_STUB_PARAM RBM_R4 #define PREDICT_REG_VIRTUAL_STUB_PARAM PREDICT_REG_R4 + // R2R indirect call. Use the same registers as VSD + #define REG_R2R_INDIRECT_PARAM REG_R4 + #define RBM_R2R_INDIRECT_PARAM RBM_R4 + // Registers used by PInvoke frame setup #define REG_PINVOKE_FRAME REG_R4 #define RBM_PINVOKE_FRAME RBM_R4 @@ -1424,6 +1422,10 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits #define RBM_INTRET RBM_R0 #define REG_LNGRET REG_PAIR_R0R1 #define RBM_LNGRET (RBM_R1|RBM_R0) + #define REG_LNGRET_LO REG_R0 + #define REG_LNGRET_HI REG_R1 + #define RBM_LNGRET_LO RBM_R0 + #define RBM_LNGRET_HI RBM_R1 #define REG_FLOATRET REG_F0 #define RBM_FLOATRET RBM_F0 @@ -1434,7 +1436,7 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits #define RBM_STOP_FOR_GC_TRASH (RBM_CALLEE_TRASH & ~(RBM_FLOATRET | RBM_INTRET)) // The registers trashed by the CORINFO_HELP_INIT_PINVOKE_FRAME helper. - #define RBM_INIT_PINVOKE_FRAME_TRASH RBM_CALLEE_TRASH + #define RBM_INIT_PINVOKE_FRAME_TRASH (RBM_CALLEE_TRASH | RBM_PINVOKE_TCB | RBM_PINVOKE_SCRATCH) #define REG_FPBASE REG_R11 #define RBM_FPBASE RBM_R11 @@ -1668,7 +1670,6 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits // R2R indirect call. Use the same registers as VSD #define REG_R2R_INDIRECT_PARAM REG_R11 #define RBM_R2R_INDIRECT_PARAM RBM_R11 - #define PREDICT_REG_RER_INDIRECT_PARAM PREDICT_REG_R11 // Registers used by PInvoke frame setup #define REG_PINVOKE_FRAME REG_R9 |