summaryrefslogtreecommitdiff
path: root/src/jit/rationalize.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/jit/rationalize.cpp')
-rw-r--r--src/jit/rationalize.cpp16
1 files changed, 10 insertions, 6 deletions
diff --git a/src/jit/rationalize.cpp b/src/jit/rationalize.cpp
index 7f5a26fa1f..00e0bec6f7 100644
--- a/src/jit/rationalize.cpp
+++ b/src/jit/rationalize.cpp
@@ -7,6 +7,7 @@
#pragma hdrstop
#endif
+#ifndef LEGACY_BACKEND
// state carried over the tree walk, to be used in making
// a splitting decision.
struct SplitData
@@ -116,17 +117,14 @@ void Rationalizer::RewriteSIMDOperand(LIR::Use& use, bool keepBlk)
addr->gtType = simdType;
use.ReplaceWith(comp, addr);
}
-#if defined(_TARGET_X86_)
- // For x86, if we have GT_IND(GT_ADDR(GT_SIMD)), remove the GT_IND(GT_ADDR()), leaving just
- // the GT_SIMD.
else if ((addr->OperGet() == GT_ADDR) && (addr->gtGetOp1()->OperGet() == GT_SIMD))
{
+ // if we have GT_IND(GT_ADDR(GT_SIMD)), remove the GT_IND(GT_ADDR()), leaving just the GT_SIMD.
BlockRange().Remove(tree);
BlockRange().Remove(addr);
use.ReplaceWith(comp, addr->gtGetOp1());
}
-#endif // defined(_TARGET_X86_)
else if (!keepBlk)
{
tree->SetOper(GT_IND);
@@ -729,6 +727,11 @@ Compiler::fgWalkResult Rationalizer::RewriteNode(GenTree** useEdge, ArrayStack<G
case GT_IND:
// Clear the `GTF_IND_ASG_LHS` flag, which overlaps with `GTF_IND_REQ_ADDR_IN_REG`.
node->gtFlags &= ~GTF_IND_ASG_LHS;
+
+ if (varTypeIsSIMD(node))
+ {
+ RewriteSIMDOperand(use, false);
+ }
break;
case GT_NOP:
@@ -795,7 +798,7 @@ Compiler::fgWalkResult Rationalizer::RewriteNode(GenTree** useEdge, ArrayStack<G
BlockRange().Remove(node);
break;
-#ifdef _TARGET_XARCH_
+#if defined(_TARGET_XARCH_) || defined(_TARGET_ARM_)
case GT_CLS_VAR:
{
// Class vars that are the target of an assignment will get rewritten into
@@ -910,7 +913,7 @@ Compiler::fgWalkResult Rationalizer::RewriteNode(GenTree** useEdge, ArrayStack<G
op1->gtType = simdType;
}
- GenTree* op2 = simdNode->gtGetOp2();
+ GenTree* op2 = simdNode->gtGetOp2IfPresent();
if (op2 != nullptr && op2->gtType == TYP_STRUCT)
{
op2->gtType = simdType;
@@ -1052,3 +1055,4 @@ void Rationalizer::DoPhase()
comp->compRationalIRForm = true;
}
+#endif // LEGACY_BACKEND