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Diffstat (limited to 'src/jit/instr.cpp')
-rw-r--r--src/jit/instr.cpp92
1 files changed, 54 insertions, 38 deletions
diff --git a/src/jit/instr.cpp b/src/jit/instr.cpp
index 7332ba6c71..e2435cab28 100644
--- a/src/jit/instr.cpp
+++ b/src/jit/instr.cpp
@@ -797,7 +797,6 @@ void CodeGen::sched_AM(instruction ins,
}
else if (addr->IsCnsIntOrI())
{
-#ifdef RELOC_SUPPORT
// Do we need relocations?
if (compiler->opts.compReloc && addr->IsIconHandle())
{
@@ -806,7 +805,6 @@ void CodeGen::sched_AM(instruction ins,
// so that we can uniquely identify the handle
assert(offs <= 4);
}
-#endif
ssize_t disp = addr->gtIntCon.gtIconVal + offs;
if ((insType == eIT_Store) && (ireg != REG_NA))
{
@@ -1113,7 +1111,6 @@ void CodeGen::sched_AM(instruction ins,
assert(addr->IsCnsIntOrI());
-#ifdef RELOC_SUPPORT
// Do we need relocations?
if (compiler->opts.compReloc && addr->IsIconHandle())
{
@@ -1122,7 +1119,7 @@ void CodeGen::sched_AM(instruction ins,
// so that we can uniquely identify the handle
assert(offs <= 4);
}
-#endif
+
reg = REG_NA;
ssize_t disp = addr->gtIntCon.gtIconVal + offs;
@@ -1251,9 +1248,12 @@ void CodeGen::sched_AM(instruction ins,
* Emit a "call [r/m]" instruction (the r/m operand given by a tree).
*/
-void CodeGen::instEmit_indCall(GenTreePtr call,
+// clang-format off
+void CodeGen::instEmit_indCall(GenTreeCall* call,
size_t argSize,
- emitAttr retSize MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(emitAttr secondRetSize))
+ emitAttr retSize
+ MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(emitAttr secondRetSize))
+// clang-format on
{
GenTreePtr addr;
@@ -1266,18 +1266,16 @@ void CodeGen::instEmit_indCall(GenTreePtr call,
CORINFO_SIG_INFO* sigInfo = nullptr;
- assert(call->gtOper == GT_CALL);
-
/* Get hold of the function address */
- assert(call->gtCall.gtCallType == CT_INDIRECT);
- addr = call->gtCall.gtCallAddr;
+ assert(call->gtCallType == CT_INDIRECT);
+ addr = call->gtCallAddr;
assert(addr);
#ifdef DEBUG
// Pass the call signature information from the GenTree node so the emitter can associate
// native call sites with the signatures they were generated from.
- sigInfo = call->gtCall.callSig;
+ sigInfo = call->callSig;
#endif // DEBUG
#if CPU_LOAD_STORE_ARCH
@@ -1290,11 +1288,19 @@ void CodeGen::instEmit_indCall(GenTreePtr call,
{
ssize_t funcPtr = addr->gtIntCon.gtIconVal;
+ // clang-format off
getEmitter()->emitIns_Call(emitter::EC_FUNC_ADDR,
NULL, // methHnd
- INDEBUG_LDISASM_COMMA(sigInfo)(void*) funcPtr, argSize,
- retSize MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(secondRetSize),
- gcInfo.gcVarPtrSetCur, gcInfo.gcRegGCrefSetCur, gcInfo.gcRegByrefSetCur);
+ INDEBUG_LDISASM_COMMA(sigInfo)
+ (void*) funcPtr,
+ argSize,
+ retSize
+ MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(secondRetSize),
+ gcInfo.gcVarPtrSetCur,
+ gcInfo.gcRegGCrefSetCur,
+ gcInfo.gcRegByrefSetCur);
+ // clang-format on
+
return;
}
}
@@ -1347,11 +1353,19 @@ void CodeGen::instEmit_indCall(GenTreePtr call,
{
ssize_t funcPtr = addr->gtIntCon.gtIconVal;
+ // clang-format off
getEmitter()->emitIns_Call(emitter::EC_FUNC_ADDR,
nullptr, // methHnd
- INDEBUG_LDISASM_COMMA(sigInfo)(void*) funcPtr, argSize,
- retSize MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(secondRetSize),
- gcInfo.gcVarPtrSetCur, gcInfo.gcRegGCrefSetCur, gcInfo.gcRegByrefSetCur);
+ INDEBUG_LDISASM_COMMA(sigInfo)
+ (void*) funcPtr,
+ argSize,
+ retSize
+ MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(secondRetSize),
+ gcInfo.gcVarPtrSetCur,
+ gcInfo.gcRegGCrefSetCur,
+ gcInfo.gcRegByrefSetCur);
+ // clang-format on
+
return;
}
}
@@ -1386,7 +1400,7 @@ void CodeGen::instEmit_indCall(GenTreePtr call,
INDEBUG(bool yes =)
genCreateAddrMode(addr, -1, true, RBM_NONE, &rev, &rv1, &rv2, &mul, &cns);
- INDEBUG(PREFIX_ASSUME(yes)); // since we have called genMakeAddressable() on call->gtCall.gtCallAddr
+ INDEBUG(PREFIX_ASSUME(yes)); // since we have called genMakeAddressable() on call->gtCallAddr
/* Get the additional operands if any */
@@ -1409,14 +1423,23 @@ void CodeGen::instEmit_indCall(GenTreePtr call,
#endif // CPU_LOAD_STORE_ARCH
+ // clang-format off
getEmitter()->emitIns_Call(emitCallType,
nullptr, // methHnd
- INDEBUG_LDISASM_COMMA(sigInfo) nullptr, // addr
- argSize, retSize MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(secondRetSize),
- gcInfo.gcVarPtrSetCur, gcInfo.gcRegGCrefSetCur, gcInfo.gcRegByrefSetCur,
+ INDEBUG_LDISASM_COMMA(sigInfo)
+ nullptr, // addr
+ argSize,
+ retSize
+ MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(secondRetSize),
+ gcInfo.gcVarPtrSetCur,
+ gcInfo.gcRegGCrefSetCur,
+ gcInfo.gcRegByrefSetCur,
BAD_IL_OFFSET, // ilOffset
- brg, xrg, mul,
+ brg,
+ xrg,
+ mul,
cns); // addressing mode values
+ // clang-format on
}
#ifdef LEGACY_BACKEND
@@ -2326,7 +2349,7 @@ void CodeGen::inst_RV_TT(instruction ins,
#if CPU_LOAD_STORE_ARCH
if (ins == INS_mov)
{
-#if defined(_TARGET_ARM_)
+#if defined(_TARGET_ARM_) && CPU_LONG_USES_REGPAIR
if (tree->TypeGet() != TYP_LONG)
{
ins = ins_Move_Extend(tree->TypeGet(), (tree->gtFlags & GTF_REG_VAL) != 0);
@@ -2341,7 +2364,7 @@ void CodeGen::inst_RV_TT(instruction ins,
ins = ins_Move_Extend(TYP_INT,
(tree->gtFlags & GTF_REG_VAL) != 0 && genRegPairHi(tree->gtRegPair) != REG_STK);
}
-#elif defined(_TARGET_ARM64_)
+#elif defined(_TARGET_ARM_) || defined(_TARGET_ARM64_)
ins = ins_Move_Extend(tree->TypeGet(), (tree->gtFlags & GTF_REG_VAL) != 0);
#else
NYI("CodeGen::inst_RV_TT with INS_mov");
@@ -2485,9 +2508,11 @@ AGAIN:
default:
regNumber regTmp;
#ifndef LEGACY_BACKEND
+#if CPU_LONG_USES_REGPAIR
if (tree->TypeGet() == TYP_LONG)
regTmp = (offs == 0) ? genRegPairLo(tree->gtRegPair) : genRegPairHi(tree->gtRegPair);
else
+#endif // CPU_LONG_USES_REGPAIR
regTmp = tree->gtRegNum;
#else // LEGACY_BACKEND
if (varTypeIsFloating(tree))
@@ -2595,17 +2620,6 @@ AGAIN:
constVal = (ssize_t)(tree->gtLngCon.gtLconVal >> 32);
size = EA_4BYTE;
}
-#ifndef LEGACY_BACKEND
-#ifdef _TARGET_ARM_
- if ((ins != INS_mov) && !arm_Valid_Imm_For_Instr(ins, constVal, flags))
- {
- regNumber constReg = (offs == 0) ? genRegPairLo(tree->gtRegPair) : genRegPairHi(tree->gtRegPair);
- instGen_Set_Reg_To_Imm(size, constReg, constVal);
- getEmitter()->emitIns_R_R(ins, size, reg, constReg, flags);
- break;
- }
-#endif // _TARGET_ARM_
-#endif // !LEGACY_BACKEND
inst_RV_IV(ins, reg, constVal, size, flags);
break;
@@ -3573,9 +3587,13 @@ instruction CodeGen::ins_FloatSqrt(var_types type)
{
ins = INS_sqrtsd;
}
+ else if (type == TYP_FLOAT)
+ {
+ ins = INS_sqrtss;
+ }
else
{
- // Right now sqrt of scalar single is not needed.
+ assert(!"ins_FloatSqrt: Unsupported type");
unreached();
}
@@ -3873,9 +3891,7 @@ void CodeGen::instGen_Set_Reg_To_Zero(emitAttr size, regNumber reg, insFlags fla
*/
void CodeGen::instGen_Set_Reg_To_Imm(emitAttr size, regNumber reg, ssize_t imm, insFlags flags)
{
-#if RELOC_SUPPORT
if (!compiler->opts.compReloc)
-#endif // RELOC_SUPPORT
{
size = EA_SIZE(size); // Strip any Reloc flags from size if we aren't doing relocs
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-02 09:58:29 +0000