Merge pull request #5249 from kyulee1/divzero

ARM64: Fix Liveness update for Division By Zero

2 files changed, 10 insertions, 8 deletions

diff --git a/src/jit/codegenarm64.cpp b/src/jit/codegenarm64.cpp
index 067e788802..dcbdcfd5e8 100644
--- a/src/jit/codegenarm64.cpp
+++ b/src/jit/codegenarm64.cpp
@@ -2328,6 +2328,7 @@ void CodeGen::genCodeForDivMod(GenTreeOp* treeNode)
 }
 
 // Generate code for ADD, SUB, MUL, DIV, UDIV, AND, OR and XOR
+// This method is expected to have called genConsumeOperands() before calling it.
 void CodeGen::genCodeForBinary(GenTree* treeNode)
 {
     const genTreeOps oper = treeNode->OperGet();
@@ -2343,7 +2344,7 @@ void CodeGen::genCodeForBinary(GenTree* treeNode)
             oper == GT_AND  ||
             oper == GT_OR   || 
             oper == GT_XOR);
-        
+
     GenTreePtr op1 = treeNode->gtGetOp1();
     GenTreePtr op2 = treeNode->gtGetOp2();
     instruction ins = genGetInsForOper(treeNode->OperGet(), targetType);
@@ -2351,8 +2352,6 @@ void CodeGen::genCodeForBinary(GenTree* treeNode)
     // The arithmetic node must be sitting in a register (since it's not contained)
     noway_assert(targetReg != REG_NA);
 
-    genConsumeOperands(treeNode->AsOp());
-
     regNumber r = emit->emitInsTernary(ins, emitTypeSize(treeNode), treeNode, op1, op2);
     noway_assert(r == targetReg);
 
@@ -2453,10 +2452,12 @@ CodeGen::genCodeForTreeNode(GenTreePtr treeNode)
 
     case GT_DIV:
     case GT_UDIV:
+        genConsumeOperands(treeNode->AsOp());
+
         if (varTypeIsFloating(targetType))
         {
             // Floating point divide never raises an exception
-            genCodeForBinary(treeNode);     
+            genCodeForBinary(treeNode);
         }
         else  // an integer divide operation
         {
@@ -2464,7 +2465,7 @@ CodeGen::genCodeForTreeNode(GenTreePtr treeNode)
             emitAttr   size      = EA_ATTR(genTypeSize(genActualType(treeNode->TypeGet())));
 
             // TODO-ARM64-CQ: Optimize a divide by power of 2 as we do for AMD64
-            
+
             if (divisorOp->IsZero())
             {
                 // We unconditionally throw a divide by zero exception
@@ -2546,7 +2547,7 @@ CodeGen::genCodeForTreeNode(GenTreePtr treeNode)
                         emitJumpKind jmpEqual = genJumpKindForOper(GT_EQ, CK_SIGNED);
                         genJumpToThrowHlpBlk(jmpEqual, SCK_DIV_BY_ZERO);
                     }
-                    genCodeForBinary(treeNode); 
+                    genCodeForBinary(treeNode);
                 }
             }
         }
@@ -2560,6 +2561,7 @@ CodeGen::genCodeForTreeNode(GenTreePtr treeNode)
     case GT_ADD:
     case GT_SUB:
     case GT_MUL:
+        genConsumeOperands(treeNode->AsOp());
         genCodeForBinary(treeNode);
         break;
 
diff --git a/src/jit/codegenxarch.cpp b/src/jit/codegenxarch.cpp
index 936ec2f62e..0940d2748e 100755
--- a/src/jit/codegenxarch.cpp
+++ b/src/jit/codegenxarch.cpp
@@ -1328,6 +1328,7 @@ void CodeGen::genCodeForDivMod(GenTreeOp* treeNode)
 
 //------------------------------------------------------------------------
 // genCodeForBinary: Generate code for many binary arithmetic operators
+// This method is expected to have called genConsumeOperands() before calling it.
 //
 // Arguments:
 //    treeNode - The binary operation for which we are generating code.
@@ -1389,8 +1390,6 @@ void CodeGen::genCodeForBinary(GenTree* treeNode)
     GenTreePtr dst;
     GenTreePtr src;
 
-    genConsumeOperands(treeNode->AsOp());
-
     // This is the case of reg1 = reg1 op reg2
     // We're ready to emit the instruction without any moves
     if (op1reg == targetReg)
@@ -1958,6 +1957,7 @@ CodeGen::genCodeForTreeNode(GenTreePtr treeNode)
 #endif // !defined(_TARGET_64BIT_)
     case GT_ADD:
     case GT_SUB:
+        genConsumeOperands(treeNode->AsOp());
         genCodeForBinary(treeNode);
         break;