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author | Steve MacLean <sdmaclea.qdt@qualcommdatacenter.com> | 2017-10-02 18:30:01 -0400 |
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committer | Steve MacLean <sdmaclea.qdt@qualcommdatacenter.com> | 2017-10-03 14:38:13 -0400 |
commit | 70165e7e97ec395c648835773d79653737e9029b (patch) | |
tree | c553c6e7c1fae569c9e7d69f95f339521335bdec /src | |
parent | bd7493440cefe9cdfb3648de99178e208f8df5df (diff) | |
download | coreclr-70165e7e97ec395c648835773d79653737e9029b.tar.gz coreclr-70165e7e97ec395c648835773d79653737e9029b.tar.bz2 coreclr-70165e7e97ec395c648835773d79653737e9029b.zip |
[Arm64] Fix smul[lh] disassembly
Diffstat (limited to 'src')
-rw-r--r-- | src/jit/emitarm64.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/jit/emitarm64.cpp b/src/jit/emitarm64.cpp index d901f8a8cf..68e58412b3 100644 --- a/src/jit/emitarm64.cpp +++ b/src/jit/emitarm64.cpp @@ -10824,6 +10824,15 @@ void emitter::emitDispIns( emitDispReg(encodingZRtoSP(id->idReg1()), size, true); emitDispReg(encodingZRtoSP(id->idReg2()), size, true); } + else if ((ins == INS_smull) || (ins == INS_smulh)) + { + // Rd is always 8 bytes + emitDispReg(id->idReg1(), EA_8BYTE, true); + + // Rn, Rm effective size depends on instruction type + size = (ins == INS_smulh) ? EA_8BYTE : EA_4BYTE; + emitDispReg(id->idReg2(), size, true); + } else { emitDispReg(id->idReg1(), size, true); |