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| author | Carol Eidt <carol.eidt@microsoft.com> | 2018-01-19 15:16:18 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-01-19 15:16:18 -0800 |
| commit | 48ee74a9e7990f1ca535a58af18dd42c62c384c7 (patch) | |
| tree | 416d76254556605d832a5f73e9adde2e31f8b763 /src | |
| parent | e435c5048c44978208c2a0dc45444a18415be272 (diff) | |
| parent | a4d79943d8c62e9edaab0ac043784b7936a3c42c (diff) | |
| download | coreclr-48ee74a9e7990f1ca535a58af18dd42c62c384c7.tar.gz coreclr-48ee74a9e7990f1ca535a58af18dd42c62c384c7.tar.bz2 coreclr-48ee74a9e7990f1ca535a58af18dd42c62c384c7.zip | |
Merge pull request #15935 from sdmaclea/PR-ARM64-IRREGULAR-NOT
[Arm64] Remove irregular vector not handling
Diffstat (limited to 'src')
| -rw-r--r-- | src/jit/emitarm64.cpp | 26 |
1 files changed, 8 insertions, 18 deletions
diff --git a/src/jit/emitarm64.cpp b/src/jit/emitarm64.cpp index cd5d0fefd4..4e07087541 100644 --- a/src/jit/emitarm64.cpp +++ b/src/jit/emitarm64.cpp @@ -3821,12 +3821,11 @@ void emitter::emitIns_R_R( case INS_not: assert(isVectorRegister(reg1)); assert(isVectorRegister(reg2)); - // for 'NOT' we can construct the arrangement: 8B or 16B - if ((ins == INS_not) && insOptsNone(opt)) + if (ins == INS_not) { assert(isValidVectorDatasize(size)); - elemsize = EA_1BYTE; - opt = optMakeArrangement(size, elemsize); + // Bitwise behavior is independent of element size, but is always encoded as 1 Byte + opt = optMakeArrangement(size, EA_1BYTE); } if (insOptsNone(opt)) { @@ -3841,11 +3840,7 @@ void emitter::emitIns_R_R( assert(isValidVectorDatasize(size)); assert(isValidArrangement(size, opt)); elemsize = optGetElemsize(opt); - if (ins == INS_not) - { - assert(elemsize == EA_1BYTE); - } - fmt = IF_DV_2M; + fmt = IF_DV_2M; } break; @@ -3854,12 +3849,11 @@ void emitter::emitIns_R_R( if (isVectorRegister(reg1)) { assert(isVectorRegister(reg2)); - // for 'mvn' we can construct the arrangement: 8B or 16b - if ((ins == INS_mvn) && insOptsNone(opt)) + if (ins == INS_mvn) { assert(isValidVectorDatasize(size)); - elemsize = EA_1BYTE; - opt = optMakeArrangement(size, elemsize); + // Bitwise behavior is independent of element size, but is always encoded as 1 Byte + opt = optMakeArrangement(size, EA_1BYTE); } if (insOptsNone(opt)) { @@ -3873,11 +3867,7 @@ void emitter::emitIns_R_R( assert(isValidVectorDatasize(size)); assert(isValidArrangement(size, opt)); elemsize = optGetElemsize(opt); - if (ins == INS_mvn) - { - assert(elemsize == EA_1BYTE); // Only supports 8B or 16B - } - fmt = IF_DV_2M; + fmt = IF_DV_2M; } break; } |