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| author | Bruce Forstall <Bruce_Forstall@msn.com> | 2019-01-15 14:21:48 -0800 |
|---|---|---|
| committer | Bruce Forstall <Bruce_Forstall@msn.com> | 2019-01-15 14:21:48 -0800 |
| commit | 91cfbf46e66b6c6339c530c08053cacbb498314a (patch) | |
| tree | 4f75a3ff5c6c783a3f8955d3b326b8e5e3ab1712 /src | |
| parent | c4e4036761771bdc3fad060e6ce70daa5b85fe2a (diff) | |
| download | coreclr-91cfbf46e66b6c6339c530c08053cacbb498314a.tar.gz coreclr-91cfbf46e66b6c6339c530c08053cacbb498314a.tar.bz2 coreclr-91cfbf46e66b6c6339c530c08053cacbb498314a.zip | |
Fix two cases of FP-relative immediate offsets not being checked for encodability
For ARM32/ARM64, the immediate offsets in addressing modes have
limited range that varies by instruction. A couple cases were not
checking for that range, leading to generating potentially
un-encodable instruction.
In particular, the test case shows a case where a very large frame in a function
with a stored generic context would fail on ARM64.
There are no code diffs from this change for ARM64, except we sometimes get
better assembly comments where the local variable referenced is annotated on
the store instruction. For ARM32, the "secret stub param" is now stored using
SP-relative addressing, not FP-relative, if possible (which we generally prefer
in main function bodies).
Diffstat (limited to 'src')
| -rw-r--r-- | src/jit/codegencommon.cpp | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/src/jit/codegencommon.cpp b/src/jit/codegencommon.cpp index 1da1012482..6c32fc6b10 100644 --- a/src/jit/codegencommon.cpp +++ b/src/jit/codegencommon.cpp @@ -5900,8 +5900,9 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg, availMask &= ~regMask; } - assert((genRegMask(rAddr) & intRegState.rsCalleeRegArgMaskLiveIn) == - 0); // rAddr is not a live incoming argument reg + // rAddr is not a live incoming argument reg + assert((genRegMask(rAddr) & intRegState.rsCalleeRegArgMaskLiveIn) == 0); + #if defined(_TARGET_ARM_) if (arm_Valid_Imm_For_Add(untrLclLo, INS_FLAGS_DONT_CARE)) #else // !_TARGET_ARM_ @@ -6221,14 +6222,18 @@ void CodeGen::genReportGenericContextArg(regNumber initReg, bool* pInitRegZeroed regSet.verifyRegUsed(reg); } -#if CPU_LOAD_STORE_ARCH +#if defined(_TARGET_ARM64_) + genInstrWithConstant(ins_Store(TYP_I_IMPL), EA_PTRSIZE, reg, genFramePointerReg(), + compiler->lvaCachedGenericContextArgOffset(), rsGetRsvdReg()); +#elif defined(_TARGET_ARM_) + // ARM's emitIns_R_R_I automatically uses the reserved register if necessary. getEmitter()->emitIns_R_R_I(ins_Store(TYP_I_IMPL), EA_PTRSIZE, reg, genFramePointerReg(), compiler->lvaCachedGenericContextArgOffset()); -#else // CPU_LOAD_STORE_ARCH +#else // !ARM64 !ARM // mov [ebp-lvaCachedGenericContextArgOffset()], reg getEmitter()->emitIns_AR_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, reg, genFramePointerReg(), compiler->lvaCachedGenericContextArgOffset()); -#endif // !CPU_LOAD_STORE_ARCH +#endif // !ARM64 !ARM } /*----------------------------------------------------------------------------- @@ -7851,8 +7856,8 @@ void CodeGen::genFnProlog() if (compiler->info.compPublishStubParam) { #if CPU_LOAD_STORE_ARCH - getEmitter()->emitIns_R_R_I(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_SECRET_STUB_PARAM, genFramePointerReg(), - compiler->lvaTable[compiler->lvaStubArgumentVar].lvStkOffs); + getEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_SECRET_STUB_PARAM, + compiler->lvaStubArgumentVar, 0); #else // mov [lvaStubArgumentVar], EAX getEmitter()->emitIns_AR_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, REG_SECRET_STUB_PARAM, genFramePointerReg(), |