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| author | Carol Eidt <carol.eidt@microsoft.com> | 2017-11-02 07:34:54 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-11-02 07:34:54 -0700 |
| commit | 762387ad7bb7a7c351a7f0a2cc8cf71956aa14fc (patch) | |
| tree | 818f2ad9268282c11b67358d3cdbf0625fc41c2f /src | |
| parent | b7b375dd29dba84decc638a2c533d50cad4acaf9 (diff) | |
| parent | 8ac261ee5c813f1a09259144c050e840e097c81e (diff) | |
| download | coreclr-762387ad7bb7a7c351a7f0a2cc8cf71956aa14fc.tar.gz coreclr-762387ad7bb7a7c351a7f0a2cc8cf71956aa14fc.tar.bz2 coreclr-762387ad7bb7a7c351a7f0a2cc8cf71956aa14fc.zip | |
Merge pull request #14791 from sdmaclea/PR-ARM64-impSIMDSelect
[Arm64] Fix impSIMDSelect
Diffstat (limited to 'src')
| -rw-r--r-- | src/jit/simd.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/jit/simd.cpp b/src/jit/simd.cpp index def834b76a..490d1369f8 100644 --- a/src/jit/simd.cpp +++ b/src/jit/simd.cpp @@ -1364,8 +1364,14 @@ GenTreePtr Compiler::impSIMDSelect( GenTree* andExpr = gtNewSIMDNode(simdType, op2, tmp, SIMDIntrinsicBitwiseAnd, baseType, size); GenTree* dupOp1 = gtCloneExpr(tmp); assert(dupOp1 != nullptr); +#ifdef _TARGET_ARM64_ + // ARM64 implements SIMDIntrinsicBitwiseAndNot as Left & ~Right + GenTree* andNotExpr = gtNewSIMDNode(simdType, op3, dupOp1, SIMDIntrinsicBitwiseAndNot, baseType, size); +#else + // XARCH implements SIMDIntrinsicBitwiseAndNot as ~Left & Right GenTree* andNotExpr = gtNewSIMDNode(simdType, dupOp1, op3, SIMDIntrinsicBitwiseAndNot, baseType, size); - GenTree* simdTree = gtNewSIMDNode(simdType, andExpr, andNotExpr, SIMDIntrinsicBitwiseOr, baseType, size); +#endif + GenTree* simdTree = gtNewSIMDNode(simdType, andExpr, andNotExpr, SIMDIntrinsicBitwiseOr, baseType, size); // If asg not null, create a GT_COMMA tree. if (asg != nullptr) |