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author | Jan Kotas <jkotas@microsoft.com> | 2017-05-23 15:09:03 -0700 |
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committer | GitHub <noreply@github.com> | 2017-05-23 15:09:03 -0700 |
commit | 4229c5d7ea196c93dc8b76c8718929a2e4ff94ed (patch) | |
tree | 08bc23158634d2c348df6a761548b2687744722e /src | |
parent | 1bcbea8102ace0cda74b9ecb3e05151944610e42 (diff) | |
download | coreclr-4229c5d7ea196c93dc8b76c8718929a2e4ff94ed.tar.gz coreclr-4229c5d7ea196c93dc8b76c8718929a2e4ff94ed.tar.bz2 coreclr-4229c5d7ea196c93dc8b76c8718929a2e4ff94ed.zip |
Delete special handling of IJW RVA fields at NGen time (#11818)
Mixed mode managed C++ is not supported by CoreCLR so this is not needed for anything.
Fixes #11761
Diffstat (limited to 'src')
-rw-r--r-- | src/inc/corcompile.h | 9 | ||||
-rw-r--r-- | src/vm/ceeload.cpp | 2 | ||||
-rw-r--r-- | src/vm/compile.cpp | 18 | ||||
-rw-r--r-- | src/vm/field.cpp | 2 | ||||
-rw-r--r-- | src/vm/field.h | 6 | ||||
-rw-r--r-- | src/zap/zapinfo.cpp | 39 |
6 files changed, 3 insertions, 73 deletions
diff --git a/src/inc/corcompile.h b/src/inc/corcompile.h index f99e27eec0..68eefc143a 100644 --- a/src/inc/corcompile.h +++ b/src/inc/corcompile.h @@ -468,15 +468,6 @@ struct CORCOMPILE_EE_INFO_TABLE DWORD threadTlsIndex; DWORD rvaStaticTlsIndex; - -// These are used by the 64-bit JITs to detect calls to thunks in the .nep section -// and conditionally eliminate double-thunking (managed-to-native-to-managed). -// During prejit these are set to the RVAs of the .nep section. When the prejitted -// image is actually loaded, these are fixed up to point to the actual .nep section -// of the ijw image (not the native image). - - BYTE * nativeEntryPointStart; - BYTE * nativeEntryPointEnd; }; /*********************************************************************************/ diff --git a/src/vm/ceeload.cpp b/src/vm/ceeload.cpp index e989bb059f..b6b4726122 100644 --- a/src/vm/ceeload.cpp +++ b/src/vm/ceeload.cpp @@ -9512,7 +9512,7 @@ void Module::Arrange(DataImage *image) else if (TypeFromToken(token) == mdtFieldDef) { FieldDesc *pFD = LookupFieldDef(token); - if (pFD && pFD->IsILOnlyRVAField()) + if (pFD && pFD->IsRVA()) { if (entry->flags & (1 << RVAFieldData)) { diff --git a/src/vm/compile.cpp b/src/vm/compile.cpp index 1a3e66a86e..c24c3f2b8a 100644 --- a/src/vm/compile.cpp +++ b/src/vm/compile.cpp @@ -611,22 +611,6 @@ HRESULT CEECompileInfo::SetCompilationTarget(CORINFO_ASSEMBLY_HANDLE assembl } } -#ifdef FEATURE_READYTORUN_COMPILER - if (IsReadyToRunCompilation() && !pModule->IsILOnly()) - { - GetSvcLogger()->Printf(LogLevel_Error, W("Error: /readytorun not supported for mixed mode assemblies\n")); - return E_FAIL; - } -#endif - -#ifdef FEATURE_READYTORUN_COMPILER - if (IsReadyToRunCompilation() && !pModule->IsILOnly()) - { - GetSvcLogger()->Printf(LogLevel_Error, W("Error: /readytorun not supported for mixed mode assemblies\n")); - return E_FAIL; - } -#endif - return S_OK; } @@ -6803,7 +6787,7 @@ void CEEPreloader::GetRVAFieldData(mdFieldDef fd, PVOID * ppData, DWORD * pcbSiz if (pFD == NULL) ThrowHR(COR_E_TYPELOAD); - _ASSERTE(pFD->IsILOnlyRVAField()); + _ASSERTE(pFD->IsRVA()); UINT size = pFD->LoadSize(); diff --git a/src/vm/field.cpp b/src/vm/field.cpp index 667e2ac867..defccd7269 100644 --- a/src/vm/field.cpp +++ b/src/vm/field.cpp @@ -738,7 +738,7 @@ void FieldDesc::SaveContents(DataImage *image) // image. // - if (IsILOnlyRVAField()) + if (IsRVA()) { // // Move the RVA data into the prejit image. diff --git a/src/vm/field.h b/src/vm/field.h index f2cbda69e4..8f6668b154 100644 --- a/src/vm/field.h +++ b/src/vm/field.h @@ -299,12 +299,6 @@ public: : dwOffset; } - BOOL IsILOnlyRVAField() - { - WRAPPER_NO_CONTRACT; - return (IsRVA() && GetModule()->GetFile()->IsILOnly()); - } - DWORD IsStatic() const { LIMITED_METHOD_DAC_CONTRACT; diff --git a/src/zap/zapinfo.cpp b/src/zap/zapinfo.cpp index a242cef832..60e03af5c2 100644 --- a/src/zap/zapinfo.cpp +++ b/src/zap/zapinfo.cpp @@ -2675,41 +2675,6 @@ void ZapInfo::getModuleNativeEntryPointRange(void** pStart, void** pEnd) // Initialize outparams to default range of (0,0). *pStart = 0; *pEnd = 0; - - // If this is ILONLY, there are no native entry points. - if (m_pImage->m_ModuleDecoder.IsILOnly()) - { - return; - } - - rvaStart = rvaEnd = 0; - - // Walk the section table looking for a section named .nep. - - IMAGE_SECTION_HEADER *section = m_pImage->m_ModuleDecoder.FindFirstSection(); - IMAGE_SECTION_HEADER *sectionEnd = section + m_pImage->m_ModuleDecoder.GetNumberOfSections(); - while (section < sectionEnd) - { - if (strncmp((const char *)(section->Name), ".nep", IMAGE_SIZEOF_SHORT_NAME) == 0) - { - rvaStart = VAL32(section->VirtualAddress); - rvaEnd = rvaStart + VAL32(section->Misc.VirtualSize); - if (rvaStart < rvaEnd) - { - // RVA will be fixed up to the actual address at runtime - CORCOMPILE_EE_INFO_TABLE * pEEInfoTable = (CORCOMPILE_EE_INFO_TABLE *)m_pImage->m_pEEInfoTable->GetData(); - pEEInfoTable->nativeEntryPointStart = (BYTE*)((ULONG_PTR)rvaStart); - pEEInfoTable->nativeEntryPointEnd = (BYTE*)((ULONG_PTR)rvaEnd); - - *pStart = m_pImage->GetInnerPtr(m_pImage->m_pEEInfoTable, - offsetof(CORCOMPILE_EE_INFO_TABLE, nativeEntryPointStart)); - *pEnd = m_pImage->GetInnerPtr(m_pImage->m_pEEInfoTable, - offsetof(CORCOMPILE_EE_INFO_TABLE, nativeEntryPointEnd)); - } - break; - } - section++; - } } DWORD ZapInfo::getExpectedTargetArchitecture() @@ -3214,10 +3179,6 @@ void * ZapInfo::getArrayInitializationData(CORINFO_FIELD_HANDLE field, DWORD siz if (m_pEEJitInfo->getClassModule(m_pEEJitInfo->getFieldClass(field)) != m_pImage->m_hModule) return NULL; - // FieldDesc::SaveContents() does not save the RVA blob for IJW modules. - if (!m_pImage->m_ModuleDecoder.IsILOnly()) - return NULL; - void * arrayData = m_pEEJitInfo->getArrayInitializationData(field, size); if (!arrayData) return NULL; |