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| author | Hyeongseok Oh <hseok82.oh@samsung.com> | 2017-08-11 14:00:02 +0900 |
|---|---|---|
| committer | Hyeongseok Oh <hseok82.oh@samsung.com> | 2017-08-11 14:00:02 +0900 |
| commit | f6b794ba42716ae6ffea790eebbabc3900a973cb (patch) | |
| tree | e78a8e20839970368abb717979df6d023f30dbc3 /src | |
| parent | 4ad9c3e8f45f36d6e35de4383ea6d504b87295f5 (diff) | |
| download | coreclr-f6b794ba42716ae6ffea790eebbabc3900a973cb.tar.gz coreclr-f6b794ba42716ae6ffea790eebbabc3900a973cb.tar.bz2 coreclr-f6b794ba42716ae6ffea790eebbabc3900a973cb.zip | |
Fix genSpillVar
Fix genSpillVar() instead of insertMove()
Diffstat (limited to 'src')
| -rw-r--r-- | src/jit/codegenlinear.cpp | 2 | ||||
| -rw-r--r-- | src/jit/lsra.cpp | 5 |
2 files changed, 1 insertions, 6 deletions
diff --git a/src/jit/codegenlinear.cpp b/src/jit/codegenlinear.cpp index 59d08de9ce..f1a8d24258 100644 --- a/src/jit/codegenlinear.cpp +++ b/src/jit/codegenlinear.cpp @@ -735,7 +735,7 @@ void CodeGen::genSpillVar(GenTreePtr tree) restoreRegVar = true; } - instruction storeIns = ins_Store(tree->TypeGet(), compiler->isSIMDTypeLocalAligned(varNum)); + instruction storeIns = ins_Store(lclTyp, compiler->isSIMDTypeLocalAligned(varNum)); #if CPU_LONG_USES_REGPAIR if (varTypeIsMultiReg(tree)) { diff --git a/src/jit/lsra.cpp b/src/jit/lsra.cpp index 09636f425a..28617b9583 100644 --- a/src/jit/lsra.cpp +++ b/src/jit/lsra.cpp @@ -9209,11 +9209,6 @@ void LinearScan::insertMove( GenTreePtr src = compiler->gtNewLclvNode(lclNum, varDsc->TypeGet()); src->gtLsraInfo.isLsraAdded = true; - if (varDsc->lvNormalizeOnStore()) - { - src->gtType = TYP_INT; - } - // There are three cases we need to handle: // - We are loading a lclVar from the stack. // - We are storing a lclVar to the stack. |