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| author | Timur Mustafin/Platform Lab /SRR/Engineer/Samsung Electronics <t.mustafin@partner.samsung.com> | 2020-08-10 12:40:39 +0300 |
|---|---|---|
| committer | 이형주/Common Platform Lab(SR)/Staff Engineer/삼성전자 <leee.lee@samsung.com> | 2020-08-10 18:40:39 +0900 |
| commit | dc5ea62a519533d193194025ad31135262acf0e9 (patch) | |
| tree | 3a5e09a71b007c33c41c0d00e24171d05bcf434c /src/vm | |
| parent | dbfc7071dd4aa23481e1932ed3b006101709880c (diff) | |
| download | coreclr-dc5ea62a519533d193194025ad31135262acf0e9.tar.gz coreclr-dc5ea62a519533d193194025ad31135262acf0e9.tar.bz2 coreclr-dc5ea62a519533d193194025ad31135262acf0e9.zip | |
Fix buffer overrun in JIT for Vector256<T> types on ARM64. (#35864) (#308)submit/tizen/20200811.004222accepted/tizen/unified/20200811.050456
Stop recognizing Vector256<T> types as intrinsic for ARM64 in Crossgen2.
Signed-off-by: Timur <t-mustafin@partner.samsung.com>
Diffstat (limited to 'src/vm')
| -rw-r--r-- | src/vm/class.cpp | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/vm/class.cpp b/src/vm/class.cpp index a24f213c35..feafc29542 100644 --- a/src/vm/class.cpp +++ b/src/vm/class.cpp @@ -1201,10 +1201,6 @@ int MethodTable::GetVectorSize() { vectorSize = 16; } - else if (strcmp(className, "Vector256`1") == 0) - { - vectorSize = 32; - } else if (strcmp(className, "Vector64`1") == 0) { vectorSize = 8; |