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author | Pat Gavlin <pagavlin@microsoft.com> | 2017-07-27 12:32:07 -0700 |
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committer | Pat Gavlin <pagavlin@microsoft.com> | 2017-07-27 12:32:07 -0700 |
commit | edf8c17adba6f9b8120adaa943693f27ef82bdbf (patch) | |
tree | 15eb1d8fbb12d4b57a7647a0500bca5e77e3c90c /src/vm | |
parent | c372ab8695b066efc10823ba69b338fd4f6c2e58 (diff) | |
download | coreclr-edf8c17adba6f9b8120adaa943693f27ef82bdbf.tar.gz coreclr-edf8c17adba6f9b8120adaa943693f27ef82bdbf.tar.bz2 coreclr-edf8c17adba6f9b8120adaa943693f27ef82bdbf.zip |
Fix `getTargetOfCall` for ARM.
If the instruction we're decoding is not a call, don't attempt to decode
it as if it were an x86 instruction. Instead, just return 0 as on ARM64.
Diffstat (limited to 'src/vm')
-rw-r--r-- | src/vm/gccover.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/vm/gccover.cpp b/src/vm/gccover.cpp index 15ce76164c..895c176460 100644 --- a/src/vm/gccover.cpp +++ b/src/vm/gccover.cpp @@ -1035,6 +1035,10 @@ static SLOT getTargetOfCall(SLOT instrPtr, PCONTEXT regs, SLOT*nextInstr) { unsigned int regnum = (instrPtr[0] & 0x78) >> 3; return (BYTE *)getRegVal(regnum, regs); } + else + { + return 0; // Not a call. + } #elif defined(_TARGET_ARM64_) if (((*reinterpret_cast<DWORD*>(instrPtr)) & 0xFC000000) == 0x94000000) { |