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| author | Aditya Mandaleeka <adityam@microsoft.com> | 2018-04-26 18:21:10 -0700 |
|---|---|---|
| committer | Aditya Mandaleeka <adityam@microsoft.com> | 2018-04-26 18:21:10 -0700 |
| commit | d17bdb0770ea91bcd4ecc47903aecb037452982e (patch) | |
| tree | 03e787e0cb24d6db41f0cd15fb5fe56a5d370b47 /src/vm/arm64 | |
| parent | 9cefdd60d2c58c34c11b74f0cd042fb0731ca720 (diff) | |
| download | coreclr-d17bdb0770ea91bcd4ecc47903aecb037452982e.tar.gz coreclr-d17bdb0770ea91bcd4ecc47903aecb037452982e.tar.bz2 coreclr-d17bdb0770ea91bcd4ecc47903aecb037452982e.zip | |
Fix register being shifted in pinvoke stub.
Diffstat (limited to 'src/vm/arm64')
| -rw-r--r-- | src/vm/arm64/PInvokeStubs.asm | 4 | ||||
| -rw-r--r-- | src/vm/arm64/pinvokestubs.S | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/vm/arm64/PInvokeStubs.asm b/src/vm/arm64/PInvokeStubs.asm index 69d8a91e1e..8e288cbc9f 100644 --- a/src/vm/arm64/PInvokeStubs.asm +++ b/src/vm/arm64/PInvokeStubs.asm @@ -64,8 +64,8 @@ __PInvokeGenStubFuncName SETS "$__PInvokeGenStubFuncName":CC:"_RetBuffArg" ; The way we do this is to shift the managed target to the left by one bit and then set the ; least significant bit to 1. This works because MethodDesc* are always 8-byte aligned. ; - lsl x9, x9, #1 - orr x9, x9, #1 + lsl x12, x12, #1 + orr x12, x12, #1 ENDIF EPILOG_BRANCH_REG x9 diff --git a/src/vm/arm64/pinvokestubs.S b/src/vm/arm64/pinvokestubs.S index 38f4665713..674d72336b 100644 --- a/src/vm/arm64/pinvokestubs.S +++ b/src/vm/arm64/pinvokestubs.S @@ -38,8 +38,8 @@ // The way we do this is to shift the managed target to the left by one bit and then set the // least significant bit to 1. This works because MethodDesc* are always 8-byte aligned. // - lsl x9, x9, #1 - orr x9, x9, #1 + lsl x12, x12, #1 + orr x12, x12, #1 .endif EPILOG_BRANCH_REG x9 |