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| author | Egor Chesakov <Egor.Chesakov@microsoft.com> | 2018-09-03 20:19:50 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-09-03 20:19:50 -0700 |
| commit | b042edd2d3aab48fe9524381b8b445b910722d8d (patch) | |
| tree | ddfe0d2dfdbc9415676a824a6c6993bf4631cfd5 /src/vm/arm/cgencpu.h | |
| parent | 0821f6f06f34146053356bf944d01aff086bb312 (diff) | |
| download | coreclr-b042edd2d3aab48fe9524381b8b445b910722d8d.tar.gz coreclr-b042edd2d3aab48fe9524381b8b445b910722d8d.tar.bz2 coreclr-b042edd2d3aab48fe9524381b8b445b910722d8d.zip | |
Deal with cross-bitness compilation warnings Pt.2 (#19781)
* Disable ASMCONSTANTS_C_ASSERT in cross-bitness scenario in src/vm/ceeload.cpp
* Adjust MAXFIELDMARSHALERSIZE for cross-bitness scenario in src/vm/arm/cgencpu.h
* Make ALLOC_ALIGN_CONSTANT host specific in src/inc/stdmacros.h
* Make PRECODE_ALIGNMENT host specific in src/vm/arm/cgencpu.h
* Disable unreachable code in src/vm/arm/stubs.cpp
* Adjust CorDBIPC_BUFFER_SIZE for cross-bitness scenario in src/debug/inc/dbgipcevents.h
* Disable warning C4359 in src/vm/arm/cgencpu.h
* Deal with warning C4267: 'initializing': conversion from 'size_t' to 'int' in src/vm/stublink.cpp
* Deal with warning C4267: 'initializing': conversion from 'size_t' to 'int' in src/vm/callingconvention.h
* Disable unreachable REGDISPLAY constructor in src/inc/regdisp.h
Diffstat (limited to 'src/vm/arm/cgencpu.h')
| -rw-r--r-- | src/vm/arm/cgencpu.h | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/src/vm/arm/cgencpu.h b/src/vm/arm/cgencpu.h index 745626bd40..62891170c4 100644 --- a/src/vm/arm/cgencpu.h +++ b/src/vm/arm/cgencpu.h @@ -102,7 +102,11 @@ EXTERN_C void setFPReturn(int fpSize, INT64 retVal); // as large as the largest FieldMarshaler subclass. This requirement // is guarded by an assert. //======================================================================= +#ifdef _WIN64 +#define MAXFIELDMARSHALERSIZE 40 +#else #define MAXFIELDMARSHALERSIZE 24 +#endif //********************************************************************** // Parameter size @@ -985,6 +989,11 @@ inline BOOL IsUnmanagedValueTypeReturnedByRef(UINT sizeofvaluetype) return (sizeofvaluetype > 4); } +#ifdef _MSC_VER +#pragma warning(push) +#pragma warning(disable:4359) // Prevent "warning C4359: 'UMEntryThunkCode': Alignment specifier is less than actual alignment (8), and will be ignored." in crossbitness scenario +#endif // _MSC_VER + struct DECLSPEC_ALIGN(4) UMEntryThunkCode { WORD m_code[4]; @@ -1010,6 +1019,10 @@ struct DECLSPEC_ALIGN(4) UMEntryThunkCode } }; +#ifdef _MSC_VER +#pragma warning(pop) +#endif // _MSC_VER + struct HijackArgs { union @@ -1082,7 +1095,7 @@ inline BOOL ClrFlushInstructionCache(LPCVOID pCodeAddr, size_t sizeOfCode) EXTERN_C VOID STDCALL PrecodeFixupThunk(); -#define PRECODE_ALIGNMENT CODE_SIZE_ALIGN +#define PRECODE_ALIGNMENT sizeof(void*) #define SIZEOF_PRECODE_BASE CODE_SIZE_ALIGN #define OFFSETOF_PRECODE_TYPE 0 |