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author | Ben Pye <ben@curlybracket.co.uk> | 2015-07-01 15:10:09 +0100 |
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committer | Ben Pye <ben@curlybracket.co.uk> | 2015-07-24 16:45:35 +0100 |
commit | 9cd8273572260317c6acc126333e5a6e56aaeb06 (patch) | |
tree | f125e83a6908151322aa20940b63c64c621c1169 /src/vm/arm/cgencpu.h | |
parent | acca43b33dcd97d1dc5d92147a3047a3bdfaf1ce (diff) | |
download | coreclr-9cd8273572260317c6acc126333e5a6e56aaeb06.tar.gz coreclr-9cd8273572260317c6acc126333e5a6e56aaeb06.tar.bz2 coreclr-9cd8273572260317c6acc126333e5a6e56aaeb06.zip |
Add ARM target for CoreCLR on Linux.
c_runtime/vprintf/test1 is disabled as casting NULL to va_list is
against the C specification.
Fix SetFilePointer tests on 32 bit platforms.
Define _FILE_OFFSET_BITS=64 so that we have long file support on 32 bit
platforms.
Implement context capture/restore for ARM.
Link libgcc_s before libunwind on ARM so C++ exceptions work.
Translate armasm to gas syntax.
Specify Thumb, VFPv3, ARMv7 for the ARM target.
Add ARM configuration to mscorlib build
Implement GetLogicalProcessorCacheSizeFromOS in PAL.
Set UNWIND_CONTEXT_IS_UCONTEXT_T from configure check.
Diffstat (limited to 'src/vm/arm/cgencpu.h')
-rw-r--r-- | src/vm/arm/cgencpu.h | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/vm/arm/cgencpu.h b/src/vm/arm/cgencpu.h index 64619fd19f..362d86ebad 100644 --- a/src/vm/arm/cgencpu.h +++ b/src/vm/arm/cgencpu.h @@ -747,7 +747,7 @@ public: else { _ASSERTE(reg1 != ThumbReg(15) && reg2 != ThumbReg(15)); - Emit16((WORD)(0x4500 | reg2 << 3 | reg1 & 0x7 | (reg1 & 0x8 ? 0x80 : 0x0))); + Emit16((WORD)(0x4500 | reg2 << 3 | (reg1 & 0x7) | (reg1 & 0x8 ? 0x80 : 0x0))); } } @@ -931,7 +931,7 @@ inline BOOL IsUnmanagedValueTypeReturnedByRef(UINT sizeofvaluetype) return (sizeofvaluetype > 4); } -DECLSPEC_ALIGN(4) struct UMEntryThunkCode +struct DECLSPEC_ALIGN(4) UMEntryThunkCode { WORD m_code[4]; @@ -1002,6 +1002,7 @@ inline BOOL ClrFlushInstructionCache(LPCVOID pCodeAddr, size_t sizeOfCode) #endif } +#ifndef FEATURE_IMPLICIT_TLS // // JIT HELPER ALIASING FOR PORTABILITY. // @@ -1013,7 +1014,11 @@ inline BOOL ClrFlushInstructionCache(LPCVOID pCodeAddr, size_t sizeOfCode) #define JIT_GetSharedGCStaticBaseNoCtor JIT_GetSharedGCStaticBaseNoCtor_InlineGetAppDomain #define JIT_GetSharedNonGCStaticBaseNoCtor JIT_GetSharedNonGCStaticBaseNoCtor_InlineGetAppDomain +#endif + +#ifndef FEATURE_PAL #define JIT_Stelem_Ref JIT_Stelem_Ref +#endif //------------------------------------------------------------------------ // @@ -1329,6 +1334,6 @@ inline size_t GetARMInstructionLength(PBYTE pInstr) return GetARMInstructionLength(*(WORD*)pInstr); } -EXTERN_C void FCallMemcpy(byte* dest, byte* src, int len); +EXTERN_C void FCallMemcpy(BYTE* dest, BYTE* src, int len); #endif // __cgencpu_h__ |