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| author | Mikhail Kashkarov <m.kashkarov@partner.samsung.com> | 2019-12-06 18:57:11 +0300 |
|---|---|---|
| committer | Gleb Balykov <g.balykov@samsung.com> | 2020-03-25 15:29:41 +0300 |
| commit | 273a346e7bc2969e8176a6c86bb73b025907cd6a (patch) | |
| tree | 1c220bbd61df712b70d44b369c8afb1304a941af /src/pal/src | |
| parent | 01bbc42b312caeb4000c9002561c62fe4e420ab5 (diff) | |
| download | coreclr-273a346e7bc2969e8176a6c86bb73b025907cd6a.tar.gz coreclr-273a346e7bc2969e8176a6c86bb73b025907cd6a.tar.bz2 coreclr-273a346e7bc2969e8176a6c86bb73b025907cd6a.zip | |
[Tizen] Use -mstackrealign to sync up with Tizen build changes
Tizen i586 now builds with -mstackrealign by default:
"Realign the stack at entry. On the x86, the -mstackrealign option
generates an alternate prologue and epilogue that realigns the
run-time stack if necessary. This supports mixing legacy codes that
keep 4-byte stack alignment with modern codes that keep 16-byte
stack alignment for SSE compatibility. ..."
Change-Id: I36afd18998829f897c6b2b48687c4ae1d172b84b
Signed-off-by: Mikhail Kashkarov <m.kashkarov@partner.samsung.com>
Diffstat (limited to 'src/pal/src')
0 files changed, 0 insertions, 0 deletions