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authorBruce Forstall <brucefo@microsoft.com>2019-03-15 21:27:56 -0700
committerGitHub <noreply@github.com>2019-03-15 21:27:56 -0700
commit3b05199df4b5b04a8a0eb62c17effa8374e1d726 (patch)
tree88440f21522f8c11bfe254b4a22351ebf2354052 /src/jit
parentc247e12e00d2ee671f105819afebd65950134199 (diff)
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Introduce COMPlus arm64 HW intrinsics knobs (#23244)
* Introduce COMPlus configuration variables to disable arm64 HW intrinsics classes Fixes #20708 * Formatting
Diffstat (limited to 'src/jit')
-rw-r--r--src/jit/compiler.cpp4
-rw-r--r--src/jit/hwintrinsicArm64.cpp6
-rw-r--r--src/jit/hwintrinsiclistArm64.h42
-rw-r--r--src/jit/jitconfigvalues.h29
4 files changed, 55 insertions, 26 deletions
diff --git a/src/jit/compiler.cpp b/src/jit/compiler.cpp
index 489218800e..3887f0ea98 100644
--- a/src/jit/compiler.cpp
+++ b/src/jit/compiler.cpp
@@ -2523,8 +2523,8 @@ void Compiler::compSetProcessor()
#if defined(_TARGET_ARM64_)
// There is no JitFlag for Base instructions handle manually
opts.setSupportedISA(InstructionSet_Base);
-#define HARDWARE_INTRINSIC_CLASS(flag, isa) \
- if (jitFlags.IsSet(JitFlags::flag)) \
+#define HARDWARE_INTRINSIC_CLASS(flag, jit_config, isa) \
+ if (jitFlags.IsSet(JitFlags::flag) && JitConfig.jit_config()) \
opts.setSupportedISA(InstructionSet_##isa);
#include "hwintrinsiclistArm64.h"
diff --git a/src/jit/hwintrinsicArm64.cpp b/src/jit/hwintrinsicArm64.cpp
index 31df5b0456..b662a43629 100644
--- a/src/jit/hwintrinsicArm64.cpp
+++ b/src/jit/hwintrinsicArm64.cpp
@@ -11,7 +11,7 @@ namespace IsaFlag
{
enum Flag
{
-#define HARDWARE_INTRINSIC_CLASS(flag, isa) isa = 1ULL << InstructionSet_##isa,
+#define HARDWARE_INTRINSIC_CLASS(flag, jit_config, isa) isa = 1ULL << InstructionSet_##isa,
#include "hwintrinsiclistArm64.h"
None = 0,
Base = 1ULL << InstructionSet_Base,
@@ -77,7 +77,7 @@ InstructionSet Compiler::lookupHWIntrinsicISA(const char* className)
{
if (strcmp(className, "Base") == 0)
return InstructionSet_Base;
-#define HARDWARE_INTRINSIC_CLASS(flag, isa) \
+#define HARDWARE_INTRINSIC_CLASS(flag, jit_config, isa) \
if (strcmp(className, #isa) == 0) \
return InstructionSet_##isa;
#include "hwintrinsiclistArm64.h"
@@ -139,7 +139,7 @@ NamedIntrinsic Compiler::lookupHWIntrinsic(const char* className, const char* me
//
// Notes:
// This currently returns true for all partially-implemented ISAs.
-// TODO-Bug: Set this to return the correct values as GH 20427 is resolved.
+// TODO-Bug: Set this to return the correct values as https://github.com/dotnet/coreclr/issues/20427 is resolved.
//
bool HWIntrinsicInfo::isFullyImplementedIsa(InstructionSet isa)
{
diff --git a/src/jit/hwintrinsiclistArm64.h b/src/jit/hwintrinsiclistArm64.h
index 3a2ae3afab..cbf60c7374 100644
--- a/src/jit/hwintrinsiclistArm64.h
+++ b/src/jit/hwintrinsiclistArm64.h
@@ -11,27 +11,27 @@
// clang-format off
#if defined(HARDWARE_INTRINSIC_CLASS)
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_AES , Aes )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_ATOMICS , Atomics )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_CRC32 , Crc32 )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_DCPOP , Dcpop )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_DP , Dp )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_FCMA , Fcma )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_FP , Fp )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_FP16 , Fp16 )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_JSCVT , Jscvt )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_LRCPC , Lrcpc )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_PMULL , Pmull )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA1 , Sha1 )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA256 , Sha256 )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA512 , Sha512 )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA3 , Sha3 )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SIMD , Simd )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SIMD_V81 , Simd_v81 )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SIMD_FP16 , Simd_fp16)
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SM3 , Sm3 )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SM4 , Sm4 )
-HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SVE , Sve )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_AES , EnableArm64Aes , Aes )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_ATOMICS , EnableArm64Atomics , Atomics )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_CRC32 , EnableArm64Crc32 , Crc32 )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_DCPOP , EnableArm64Dcpop , Dcpop )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_DP , EnableArm64Dp , Dp )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_FCMA , EnableArm64Fcma , Fcma )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_FP , EnableArm64Fp , Fp )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_FP16 , EnableArm64Fp16 , Fp16 )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_JSCVT , EnableArm64Jscvt , Jscvt )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_LRCPC , EnableArm64Lrcpc , Lrcpc )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_PMULL , EnableArm64Pmull , Pmull )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA1 , EnableArm64Sha1 , Sha1 )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA256 , EnableArm64Sha256 , Sha256 )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA512 , EnableArm64Sha512 , Sha512 )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA3 , EnableArm64Sha3 , Sha3 )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SIMD , EnableArm64Simd , Simd )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SIMD_V81 , EnableArm64Simd_v81 , Simd_v81 )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SIMD_FP16 , EnableArm64Simd_fp16, Simd_fp16)
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SM3 , EnableArm64Sm3 , Sm3 )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SM4 , EnableArm64Sm4 , Sm4 )
+HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SVE , EnableArm64Sve , Sve )
#endif // defined(HARDWARE_INTRINSIC_CLASS)
#if defined(HARDWARE_INTRINSIC)
diff --git a/src/jit/jitconfigvalues.h b/src/jit/jitconfigvalues.h
index 842d729111..998848ec90 100644
--- a/src/jit/jitconfigvalues.h
+++ b/src/jit/jitconfigvalues.h
@@ -253,6 +253,35 @@ CONFIG_INTEGER(EnablePOPCNT, W("EnablePOPCNT"), 1) // Enable POPCNT
// Enable AVX instruction set for wide operations as default
CONFIG_INTEGER(EnableAVX, W("EnableAVX"), 0)
#endif // !defined(_TARGET_AMD64_) && !defined(_TARGET_X86_)
+
+// clang-format off
+
+#if defined(_TARGET_ARM64_)
+CONFIG_INTEGER(EnableArm64Aes , W("EnableArm64Aes"), 1)
+CONFIG_INTEGER(EnableArm64Atomics , W("EnableArm64Atomics"), 1)
+CONFIG_INTEGER(EnableArm64Crc32 , W("EnableArm64Crc32"), 1)
+CONFIG_INTEGER(EnableArm64Dcpop , W("EnableArm64Dcpop"), 1)
+CONFIG_INTEGER(EnableArm64Dp , W("EnableArm64Dp"), 1)
+CONFIG_INTEGER(EnableArm64Fcma , W("EnableArm64Fcma"), 1)
+CONFIG_INTEGER(EnableArm64Fp , W("EnableArm64Fp"), 1)
+CONFIG_INTEGER(EnableArm64Fp16 , W("EnableArm64Fp16"), 1)
+CONFIG_INTEGER(EnableArm64Jscvt , W("EnableArm64Jscvt"), 1)
+CONFIG_INTEGER(EnableArm64Lrcpc , W("EnableArm64Lrcpc"), 1)
+CONFIG_INTEGER(EnableArm64Pmull , W("EnableArm64Pmull"), 1)
+CONFIG_INTEGER(EnableArm64Sha1 , W("EnableArm64Sha1"), 1)
+CONFIG_INTEGER(EnableArm64Sha256 , W("EnableArm64Sha256"), 1)
+CONFIG_INTEGER(EnableArm64Sha512 , W("EnableArm64Sha512"), 1)
+CONFIG_INTEGER(EnableArm64Sha3 , W("EnableArm64Sha3"), 1)
+CONFIG_INTEGER(EnableArm64Simd , W("EnableArm64Simd"), 1)
+CONFIG_INTEGER(EnableArm64Simd_v81 , W("EnableArm64Simd_v81"), 1)
+CONFIG_INTEGER(EnableArm64Simd_fp16, W("EnableArm64Simd_fp16"), 1)
+CONFIG_INTEGER(EnableArm64Sm3 , W("EnableArm64Sm3"), 1)
+CONFIG_INTEGER(EnableArm64Sm4 , W("EnableArm64Sm4"), 1)
+CONFIG_INTEGER(EnableArm64Sve , W("EnableArm64Sve"), 1)
+#endif // defined(_TARGET_ARM64_)
+
+// clang-format on
+
///
/// JIT
///