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| author | Tanner Gooding <tagoo@outlook.com> | 2019-06-03 12:15:32 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-06-03 12:15:32 -0700 |
| commit | 7fa9581750aca0d959c334a9767e306251611d82 (patch) | |
| tree | 584b67d24a47858f54798a636f34fdf45d1597e8 /src/jit | |
| parent | 6631a7a0f9b6268f5e6c0f609a2d0d2a730a2118 (diff) | |
| download | coreclr-7fa9581750aca0d959c334a9767e306251611d82.tar.gz coreclr-7fa9581750aca0d959c334a9767e306251611d82.tar.bz2 coreclr-7fa9581750aca0d959c334a9767e306251611d82.zip | |
Removing the TestAllOnes, TestAllZeros, and TestMixOnesZeros methods from the Sse41 class (#24886)
* Removing the TestAllOnes, TestAllZeros, and TestMixOnesZeros methods from the Sse41 class
* Removing JIT support for the SSE41_TestAllOnes, SSE41_TestAllZeros, and SSE41_TestMixOnesZeros intrinsics
* Removing tests for the Sse41.TestAllOnes, Sse41.TestAllZeros, and Sse41.TestMixOnesZeros methods
Diffstat (limited to 'src/jit')
| -rw-r--r-- | src/jit/hwintrinsiccodegenxarch.cpp | 14 | ||||
| -rw-r--r-- | src/jit/hwintrinsiclistxarch.h | 3 | ||||
| -rw-r--r-- | src/jit/lsraxarch.cpp | 6 |
3 files changed, 0 insertions, 23 deletions
diff --git a/src/jit/hwintrinsiccodegenxarch.cpp b/src/jit/hwintrinsiccodegenxarch.cpp index 7627d125da..72fc44adc1 100644 --- a/src/jit/hwintrinsiccodegenxarch.cpp +++ b/src/jit/hwintrinsiccodegenxarch.cpp @@ -1784,19 +1784,6 @@ void CodeGen::genSSE41Intrinsic(GenTreeHWIntrinsic* node) break; } - case NI_SSE41_TestAllOnes: - { - op1Reg = op1->gtRegNum; - regNumber tmpReg = node->GetSingleTempReg(); - assert(HWIntrinsicInfo::lookupIns(intrinsicId, node->gtSIMDBaseType) == INS_ptest); - emit->emitIns_SIMD_R_R_R(INS_pcmpeqd, emitTypeSize(TYP_SIMD16), tmpReg, tmpReg, tmpReg); - emit->emitIns_R_R(INS_ptest, emitTypeSize(TYP_SIMD16), op1Reg, tmpReg); - emit->emitIns_R(INS_setb, EA_1BYTE, targetReg); - emit->emitIns_R_R(INS_movzx, EA_1BYTE, targetReg, targetReg); - break; - } - - case NI_SSE41_TestAllZeros: case NI_SSE41_TestZ: { assert(HWIntrinsicInfo::lookupIns(intrinsicId, node->gtSIMDBaseType) == INS_ptest); @@ -1815,7 +1802,6 @@ void CodeGen::genSSE41Intrinsic(GenTreeHWIntrinsic* node) break; } - case NI_SSE41_TestMixOnesZeros: case NI_SSE41_TestNotZAndNotC: { assert(HWIntrinsicInfo::lookupIns(intrinsicId, node->gtSIMDBaseType) == INS_ptest); diff --git a/src/jit/hwintrinsiclistxarch.h b/src/jit/hwintrinsiclistxarch.h index b7de03be20..447d401f25 100644 --- a/src/jit/hwintrinsiclistxarch.h +++ b/src/jit/hwintrinsiclistxarch.h @@ -356,10 +356,7 @@ HARDWARE_INTRINSIC(SSE41_RoundToPositiveInfinity, "RoundToPosi HARDWARE_INTRINSIC(SSE41_RoundToPositiveInfinityScalar, "RoundToPositiveInfinityScalar", SSE41, 10, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits) HARDWARE_INTRINSIC(SSE41_RoundToZero, "RoundToZero", SSE41, 11, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics) HARDWARE_INTRINSIC(SSE41_RoundToZeroScalar, "RoundToZeroScalar", SSE41, 11, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits) -HARDWARE_INTRINSIC(SSE41_TestAllOnes, "TestAllOnes", SSE41, -1, 16, 1, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_MultiIns|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromFirstArg) -HARDWARE_INTRINSIC(SSE41_TestAllZeros, "TestAllZeros", SSE41, -1, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_MultiIns|HW_Flag_BaseTypeFromFirstArg) HARDWARE_INTRINSIC(SSE41_TestC, "TestC", SSE41, -1, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_MultiIns|HW_Flag_BaseTypeFromFirstArg) -HARDWARE_INTRINSIC(SSE41_TestMixOnesZeros, "TestMixOnesZeros", SSE41, -1, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_MultiIns|HW_Flag_BaseTypeFromFirstArg) HARDWARE_INTRINSIC(SSE41_TestNotZAndNotC, "TestNotZAndNotC", SSE41, -1, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_MultiIns|HW_Flag_BaseTypeFromFirstArg) HARDWARE_INTRINSIC(SSE41_TestZ, "TestZ", SSE41, -1, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_MultiIns|HW_Flag_BaseTypeFromFirstArg) diff --git a/src/jit/lsraxarch.cpp b/src/jit/lsraxarch.cpp index c84a479cd0..eaaa7fff50 100644 --- a/src/jit/lsraxarch.cpp +++ b/src/jit/lsraxarch.cpp @@ -2502,12 +2502,6 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree) break; } - case NI_SSE41_TestAllOnes: - { - buildInternalFloatRegisterDefForNode(intrinsicTree); - break; - } - case NI_SSE41_Extract: { if (baseType == TYP_FLOAT) |