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author | Carol Eidt <carol.eidt@microsoft.com> | 2018-03-27 15:10:59 -0700 |
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committer | Carol Eidt <carol.eidt@microsoft.com> | 2018-03-27 15:10:59 -0700 |
commit | 365a862b14bdc90355f885434fdc2f94a31c1de6 (patch) | |
tree | 15a3303e860df4c9a9225501cefb9217c8ba63f1 /src/jit | |
parent | 0c7e15cfed9d014617892ebe2f43d0aac4994469 (diff) | |
download | coreclr-365a862b14bdc90355f885434fdc2f94a31c1de6.tar.gz coreclr-365a862b14bdc90355f885434fdc2f94a31c1de6.tar.bz2 coreclr-365a862b14bdc90355f885434fdc2f94a31c1de6.zip |
Fix comment
Diffstat (limited to 'src/jit')
-rw-r--r-- | src/jit/lsra.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/jit/lsra.cpp b/src/jit/lsra.cpp index 7cdcb8ee62..8caaedd5b6 100644 --- a/src/jit/lsra.cpp +++ b/src/jit/lsra.cpp @@ -8269,7 +8269,9 @@ void LinearScan::resolveEdge(BasicBlock* fromBlock, #ifdef _TARGET_ARM_ if (genIsValidDoubleReg(fromReg)) { - // Ensure that the other half is free. + // Ensure that either: + // - the Interval targetting fromReg is not double, or + // - the other half of the double is free. Interval* otherInterval = sourceIntervals[source[fromReg]]; regNumber upperHalfReg = REG_NEXT(fromReg); if ((otherInterval->registerType == TYP_DOUBLE) && (location[upperHalfReg] != REG_NA)) |