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author | Steve MacLean <sdmaclea.qdt@qualcommdatacenter.com> | 2017-10-23 14:11:15 -0400 |
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committer | Bruce Forstall <brucefo@microsoft.com> | 2017-10-23 11:11:15 -0700 |
commit | 2ba74317c027eb4ff1e854de02fbb9378d00a34e (patch) | |
tree | 327bacfe0eb917313b4a6c82100c620810a6ebb9 /src/jit/target.h | |
parent | c0aa11ff835222facec5401c4074e5b46cb1635f (diff) | |
download | coreclr-2ba74317c027eb4ff1e854de02fbb9378d00a34e.tar.gz coreclr-2ba74317c027eb4ff1e854de02fbb9378d00a34e.tar.bz2 coreclr-2ba74317c027eb4ff1e854de02fbb9378d00a34e.zip |
[Arm64] SIMD simple defines (#14628)
* [Arm64] SIMD simple defines
* Fix #else
Diffstat (limited to 'src/jit/target.h')
-rw-r--r-- | src/jit/target.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/jit/target.h b/src/jit/target.h index 1c352d0c1a..37919e2422 100644 --- a/src/jit/target.h +++ b/src/jit/target.h @@ -1529,6 +1529,11 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits #define CPBLK_UNROLL_LIMIT 64 // Upper bound to let the code generator to loop unroll CpBlk. #define INITBLK_UNROLL_LIMIT 64 // Upper bound to let the code generator to loop unroll InitBlk. +#ifdef FEATURE_SIMD + #define ALIGN_SIMD_TYPES 1 // whether SIMD type locals are to be aligned + #define FEATURE_PARTIAL_SIMD_CALLEE_SAVE 1 // Whether SIMD registers are partially saved at calls +#endif // FEATURE_SIMD + #define FEATURE_WRITE_BARRIER 1 // Generate the proper WriteBarrier calls for GC #define FEATURE_FIXED_OUT_ARGS 1 // Preallocate the outgoing arg area in the prolog #define FEATURE_STRUCTPROMOTE 1 // JIT Optimization to promote fields of structs into registers |