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author | Carol Eidt <carol.eidt@microsoft.com> | 2017-04-28 15:32:07 -0700 |
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committer | Carol Eidt <carol.eidt@microsoft.com> | 2017-05-25 13:40:00 -0700 |
commit | 205136aa1f74739879ce66e812732a553dfe05e3 (patch) | |
tree | c22523cdbfafe1e0304135bb261bd977882be8a6 /src/jit/simdcodegenxarch.cpp | |
parent | a125a6e786f09045a28a7d3e4a2c612602f9d220 (diff) | |
download | coreclr-205136aa1f74739879ce66e812732a553dfe05e3.tar.gz coreclr-205136aa1f74739879ce66e812732a553dfe05e3.tar.bz2 coreclr-205136aa1f74739879ce66e812732a553dfe05e3.zip |
Make untracked lclVars contained
Make untracked lclVars contained where possible.
Diffstat (limited to 'src/jit/simdcodegenxarch.cpp')
-rw-r--r-- | src/jit/simdcodegenxarch.cpp | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/jit/simdcodegenxarch.cpp b/src/jit/simdcodegenxarch.cpp index a28c6527e2..ef50aaecc0 100644 --- a/src/jit/simdcodegenxarch.cpp +++ b/src/jit/simdcodegenxarch.cpp @@ -2500,7 +2500,7 @@ void CodeGen::genSIMDIntrinsicGetItem(GenTreeSIMD* simdNode) regNumber srcReg = op1->gtRegNum; // Optimize the case of op1 is in memory and trying to access ith element. - if (op1->isMemoryOp()) + if (!op1->isUsedFromReg()) { assert(op1->isContained()); @@ -2508,15 +2508,17 @@ void CodeGen::genSIMDIntrinsicGetItem(GenTreeSIMD* simdNode) regNumber indexReg; int offset = 0; - if (op1->OperGet() == GT_LCL_FLD) + if (op1->OperIsLocal()) { // There are three parts to the total offset here: - // {offset of local} + {offset of SIMD Vector field} + {offset of element within SIMD vector}. + // {offset of local} + {offset of SIMD Vector field (lclFld only)} + {offset of element within SIMD vector}. bool isEBPbased; unsigned varNum = op1->gtLclVarCommon.gtLclNum; offset += compiler->lvaFrameAddress(varNum, &isEBPbased); - offset += op1->gtLclFld.gtLclOffs; - + if (op1->OperGet() == GT_LCL_FLD) + { + offset += op1->gtLclFld.gtLclOffs; + } baseReg = (isEBPbased) ? REG_EBP : REG_ESP; } else |