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author | Jiyoung Yun <jy910.yun@samsung.com> | 2016-12-27 16:46:08 +0900 |
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committer | Jiyoung Yun <jy910.yun@samsung.com> | 2016-12-27 16:46:08 +0900 |
commit | db20f3f1bb8595633a7e16c8900fd401a453a6b5 (patch) | |
tree | e5435159cd1bf0519276363a6fe1663d1721bed3 /src/jit/regset.cpp | |
parent | 4b4aad7217d3292650e77eec2cf4c198ea9c3b4b (diff) | |
download | coreclr-db20f3f1bb8595633a7e16c8900fd401a453a6b5.tar.gz coreclr-db20f3f1bb8595633a7e16c8900fd401a453a6b5.tar.bz2 coreclr-db20f3f1bb8595633a7e16c8900fd401a453a6b5.zip |
Imported Upstream version 1.0.0.9127upstream/1.0.0.9127
Diffstat (limited to 'src/jit/regset.cpp')
-rw-r--r-- | src/jit/regset.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/jit/regset.cpp b/src/jit/regset.cpp index 2980f96813..0d0ac3e0ce 100644 --- a/src/jit/regset.cpp +++ b/src/jit/regset.cpp @@ -3175,6 +3175,16 @@ var_types Compiler::tmpNormalizeType(var_types type) type = genActualType(type); +#if defined(FEATURE_SIMD) && !defined(_TARGET_64BIT_) + // For SIMD on 32-bit platforms, we always spill SIMD12 to a 16-byte SIMD16 temp. + // This is because we don't have a single instruction to store 12 bytes. We also + // allocate non-argument locals as 16 bytes; see lvSize(). + if (type == TYP_SIMD12) + { + type = TYP_SIMD16; + } +#endif // defined(FEATURE_SIMD) && !defined(_TARGET_64BIT_) + #else // LEGACY_BACKEND if (!varTypeIsGC(type)) { |