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author | Tanner Gooding <tagoo@outlook.com> | 2018-05-23 11:20:29 -0700 |
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committer | Tanner Gooding <tagoo@outlook.com> | 2018-05-25 16:08:06 -0700 |
commit | 5fc7dd5917d9e0d2345023a87f73a32c2ebfdbe8 (patch) | |
tree | 7eeacc428a501e73d38610e443bfcf0992f0853e /src/jit/lowerxarch.cpp | |
parent | 6977efd6b2a7b2d79479ac461da33b6512a72f90 (diff) | |
download | coreclr-5fc7dd5917d9e0d2345023a87f73a32c2ebfdbe8.tar.gz coreclr-5fc7dd5917d9e0d2345023a87f73a32c2ebfdbe8.tar.bz2 coreclr-5fc7dd5917d9e0d2345023a87f73a32c2ebfdbe8.zip |
Updating the JIT to handle the FMA hardware intrinsics.
Diffstat (limited to 'src/jit/lowerxarch.cpp')
-rw-r--r-- | src/jit/lowerxarch.cpp | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/src/jit/lowerxarch.cpp b/src/jit/lowerxarch.cpp index 0bf0c241a5..d53d3a5aa0 100644 --- a/src/jit/lowerxarch.cpp +++ b/src/jit/lowerxarch.cpp @@ -2410,6 +2410,51 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node) break; } } + else if ((intrinsicID >= NI_FMA_MultiplyAdd) && (intrinsicID <= NI_FMA_MultiplySubtractNegatedScalar)) + { + assert(numArgs == 3); + assert(op1->OperIsList()); + + GenTreeArgList* argList = op1->AsArgList(); + op1 = argList->Current(); + + argList = argList->Rest(); + GenTree* op2 = argList->Current(); + + argList = argList->Rest(); + GenTree* op3 = argList->Current(); + + if (IsContainableHWIntrinsicOp(node, op3)) + { + // 213 form: op1 = (op2 * op1) + [op3] + MakeSrcContained(node, op3); + } + else if (IsContainableHWIntrinsicOp(node, op2)) + { + // 132 form: op1 = (op1 * op3) + [op2] + MakeSrcContained(node, op2); + } + else if (IsContainableHWIntrinsicOp(node, op1)) + { + // Intrinsics with CopyUpperBits semantics cannot have op1 be contained + + if ((flags & HW_Flag_CopyUpperBits) == 0) + { + // 231 form: op3 = (op2 * op3) + [op1] + MakeSrcContained(node, op1); + } + } + else + { + // TODO-XArch-CQ: Technically any one of the three operands can + // be reg-optional. With a limitation on op1 where + // it can only be so if CopyUpperBits is off. + // https://github.com/dotnet/coreclr/issues/6361 + + // 213 form: op1 = (op2 * op1) + op3 + op3->SetRegOptional(); + } + } if (Compiler::categoryOfHWIntrinsic(intrinsicID) == HW_Category_IMM) { |