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author | Jiyoung Yun <jy910.yun@samsung.com> | 2016-11-23 19:09:09 +0900 |
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committer | Jiyoung Yun <jy910.yun@samsung.com> | 2016-11-23 19:09:09 +0900 |
commit | 4b4aad7217d3292650e77eec2cf4c198ea9c3b4b (patch) | |
tree | 98110734c91668dfdbb126fcc0e15ddbd93738ca /src/jit/lowerarm.cpp | |
parent | fa45f57ed55137c75ac870356a1b8f76c84b229c (diff) | |
download | coreclr-4b4aad7217d3292650e77eec2cf4c198ea9c3b4b.tar.gz coreclr-4b4aad7217d3292650e77eec2cf4c198ea9c3b4b.tar.bz2 coreclr-4b4aad7217d3292650e77eec2cf4c198ea9c3b4b.zip |
Imported Upstream version 1.1.0upstream/1.1.0
Diffstat (limited to 'src/jit/lowerarm.cpp')
-rw-r--r-- | src/jit/lowerarm.cpp | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/src/jit/lowerarm.cpp b/src/jit/lowerarm.cpp new file mode 100644 index 0000000000..67cea2ff4e --- /dev/null +++ b/src/jit/lowerarm.cpp @@ -0,0 +1,71 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. +// See the LICENSE file in the project root for more information. + +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +XX XX +XX Lowering for ARM XX +XX XX +XX This encapsulates all the logic for lowering trees for the ARM XX +XX architecture. For a more detailed view of what is lowering, please XX +XX take a look at Lower.cpp XX +XX XX +XX XX +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +*/ + +#include "jitpch.h" +#ifdef _MSC_VER +#pragma hdrstop +#endif + +#ifndef LEGACY_BACKEND // This file is ONLY used for the RyuJIT backend that uses the linear scan register allocator + +// The ARM backend is not yet implemented, so the methods here are all NYI. +// TODO-ARM-NYI: Lowering for ARM. +#ifdef _TARGET_ARM_ + +#include "jit.h" +#include "sideeffects.h" +#include "lower.h" +#include "lsra.h" + +/* Lowering of GT_CAST nodes */ +void Lowering::LowerCast(GenTree* tree) +{ + NYI_ARM("ARM Lowering for cast"); +} + +void Lowering::LowerRotate(GenTreePtr tree) +{ + NYI_ARM("ARM Lowering for ROL and ROR"); +} + +void Lowering::TreeNodeInfoInit(GenTree* stmt) +{ + NYI("ARM TreeNodInfoInit"); +} + +// returns true if the tree can use the read-modify-write memory instruction form +bool Lowering::isRMWRegOper(GenTreePtr tree) +{ + return false; +} + +bool Lowering::IsCallTargetInRange(void* addr) +{ + return comp->codeGen->validImmForBL((ssize_t)addr); +} + +// return true if the immediate can be folded into an instruction, for example small enough and non-relocatable +bool Lowering::IsContainableImmed(GenTree* parentNode, GenTree* childNode) +{ + NYI_ARM("ARM IsContainableImmed"); + return false; +} + +#endif // _TARGET_ARM_ + +#endif // !LEGACY_BACKEND |