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author | Jiyoung Yun <jy910.yun@samsung.com> | 2016-12-27 16:46:08 +0900 |
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committer | Jiyoung Yun <jy910.yun@samsung.com> | 2016-12-27 16:46:08 +0900 |
commit | db20f3f1bb8595633a7e16c8900fd401a453a6b5 (patch) | |
tree | e5435159cd1bf0519276363a6fe1663d1721bed3 /src/jit/instr.h | |
parent | 4b4aad7217d3292650e77eec2cf4c198ea9c3b4b (diff) | |
download | coreclr-db20f3f1bb8595633a7e16c8900fd401a453a6b5.tar.gz coreclr-db20f3f1bb8595633a7e16c8900fd401a453a6b5.tar.bz2 coreclr-db20f3f1bb8595633a7e16c8900fd401a453a6b5.zip |
Imported Upstream version 1.0.0.9127upstream/1.0.0.9127
Diffstat (limited to 'src/jit/instr.h')
-rw-r--r-- | src/jit/instr.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/src/jit/instr.h b/src/jit/instr.h index c38f8d2073..2d50234fdc 100644 --- a/src/jit/instr.h +++ b/src/jit/instr.h @@ -284,15 +284,19 @@ END_DECLARE_TYPED_ENUM(emitAttr,unsigned) #define EmitSize(x) (EA_ATTR(genTypeSize(TypeGet(x)))) // Enum specifying the instruction set for generating floating point or SIMD code. +// These enums are ordered such that each one is inclusive of previous instruction sets +// and the VM ensures this as well when setting the CONFIG flags. enum InstructionSet { #ifdef _TARGET_XARCH_ - InstructionSet_SSE2, - InstructionSet_AVX, + InstructionSet_SSE2, // SSE2 Instruction set + InstructionSet_SSE3_4, // SSE3, SSSE3, SSE4.1 and SSE4.2 instruction set + InstructionSet_AVX, // AVX2 instruction set + // TODO-Cleaup - This should be named as InstructionSet_AVX2 #elif defined(_TARGET_ARM_) InstructionSet_NEON, #endif - InstructionSet_NONE + InstructionSet_NONE // No instruction set is available indicating an invalid value }; // clang-format on |