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authorJiyoung Yun <jy910.yun@samsung.com>2017-02-10 20:35:12 +0900
committerJiyoung Yun <jy910.yun@samsung.com>2017-02-10 20:35:12 +0900
commit4b11dc566a5bbfa1378d6266525c281b028abcc8 (patch)
treeb48831a898906734f8884d08b6e18f1144ee2b82 /src/jit/instr.cpp
parentdb20f3f1bb8595633a7e16c8900fd401a453a6b5 (diff)
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Imported Upstream version 1.0.0.9910upstream/1.0.0.9910
Diffstat (limited to 'src/jit/instr.cpp')
-rw-r--r--src/jit/instr.cpp12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/jit/instr.cpp b/src/jit/instr.cpp
index edc4483c6b..7332ba6c71 100644
--- a/src/jit/instr.cpp
+++ b/src/jit/instr.cpp
@@ -3513,6 +3513,12 @@ instruction CodeGen::ins_CopyIntToFloat(var_types srcType, var_types dstType)
{
// On SSE2/AVX - the same instruction is used for moving double/quad word to XMM/YMM register.
assert((srcType == TYP_INT) || (srcType == TYP_UINT) || (srcType == TYP_LONG) || (srcType == TYP_ULONG));
+
+#if !defined(_TARGET_64BIT_)
+ // No 64-bit registers on x86.
+ assert((srcType != TYP_LONG) && (srcType != TYP_ULONG));
+#endif // !defined(_TARGET_64BIT_)
+
return INS_mov_i2xmm;
}
@@ -3520,6 +3526,12 @@ instruction CodeGen::ins_CopyFloatToInt(var_types srcType, var_types dstType)
{
// On SSE2/AVX - the same instruction is used for moving double/quad word of XMM/YMM to an integer register.
assert((dstType == TYP_INT) || (dstType == TYP_UINT) || (dstType == TYP_LONG) || (dstType == TYP_ULONG));
+
+#if !defined(_TARGET_64BIT_)
+ // No 64-bit registers on x86.
+ assert((dstType != TYP_LONG) && (dstType != TYP_ULONG));
+#endif // !defined(_TARGET_64BIT_)
+
return INS_mov_xmm2i;
}