diff options
author | Tanner Gooding <tagoo@outlook.com> | 2018-02-27 20:40:19 -0800 |
---|---|---|
committer | Tanner Gooding <tagoo@outlook.com> | 2018-02-28 12:35:00 -0800 |
commit | 76c9ccfa1a2f3aea757ab3851c35443c5b60ec90 (patch) | |
tree | a52b67a7b3dbadeee5ce9f2061e0048ee517e6f7 /src/jit/hwintrinsiccodegenxarch.cpp | |
parent | 62a52282604b6dbba9c91c939dae83f5a7e8ba83 (diff) | |
download | coreclr-76c9ccfa1a2f3aea757ab3851c35443c5b60ec90.tar.gz coreclr-76c9ccfa1a2f3aea757ab3851c35443c5b60ec90.tar.bz2 coreclr-76c9ccfa1a2f3aea757ab3851c35443c5b60ec90.zip |
Set isInternalRegDelayFree for several of the x86 hwintrinsics
Diffstat (limited to 'src/jit/hwintrinsiccodegenxarch.cpp')
-rw-r--r-- | src/jit/hwintrinsiccodegenxarch.cpp | 27 |
1 files changed, 21 insertions, 6 deletions
diff --git a/src/jit/hwintrinsiccodegenxarch.cpp b/src/jit/hwintrinsiccodegenxarch.cpp index 2c6a184b3a..24829ea821 100644 --- a/src/jit/hwintrinsiccodegenxarch.cpp +++ b/src/jit/hwintrinsiccodegenxarch.cpp @@ -608,10 +608,13 @@ void CodeGen::genSSEIntrinsic(GenTreeHWIntrinsic* node) case NI_SSE_CompareEqualUnorderedScalar: { assert(baseType == TYP_FLOAT); - op2Reg = op2->gtRegNum; - regNumber tmpReg = node->GetSingleTempReg(); + op2Reg = op2->gtRegNum; + regNumber tmpReg = node->GetSingleTempReg(); + instruction ins = Compiler::insOfHWIntrinsic(intrinsicID, node->gtSIMDBaseType); + + // Ensure we aren't overwriting targetReg + assert(tmpReg != targetReg); - instruction ins = Compiler::insOfHWIntrinsic(intrinsicID, node->gtSIMDBaseType); emit->emitIns_R_R(ins, emitTypeSize(TYP_SIMD16), op1Reg, op2Reg); emit->emitIns_R(INS_setpo, EA_1BYTE, targetReg); emit->emitIns_R(INS_sete, EA_1BYTE, tmpReg); @@ -677,11 +680,13 @@ void CodeGen::genSSEIntrinsic(GenTreeHWIntrinsic* node) case NI_SSE_CompareNotEqualUnorderedScalar: { assert(baseType == TYP_FLOAT); - op2Reg = op2->gtRegNum; + op2Reg = op2->gtRegNum; + regNumber tmpReg = node->GetSingleTempReg(); + instruction ins = Compiler::insOfHWIntrinsic(intrinsicID, node->gtSIMDBaseType); - regNumber tmpReg = node->GetSingleTempReg(); + // Ensure we aren't overwriting targetReg + assert(tmpReg != targetReg); - instruction ins = Compiler::insOfHWIntrinsic(intrinsicID, node->gtSIMDBaseType); emit->emitIns_R_R(ins, emitTypeSize(TYP_SIMD16), op1Reg, op2Reg); emit->emitIns_R(INS_setpe, EA_1BYTE, targetReg); emit->emitIns_R(INS_setne, EA_1BYTE, tmpReg); @@ -752,6 +757,10 @@ void CodeGen::genSSEIntrinsic(GenTreeHWIntrinsic* node) if (op1Reg == targetReg) { regNumber tmpReg = node->GetSingleTempReg(); + + // Ensure we aren't overwriting targetReg + assert(tmpReg != targetReg); + emit->emitIns_R_R(INS_movaps, emitTypeSize(TYP_SIMD16), tmpReg, op1Reg); op1Reg = tmpReg; } @@ -837,6 +846,9 @@ void CodeGen::genSSE2Intrinsic(GenTreeHWIntrinsic* node) regNumber tmpReg = node->GetSingleTempReg(); instruction ins = Compiler::insOfHWIntrinsic(intrinsicID, baseType); + // Ensure we aren't overwriting targetReg + assert(tmpReg != targetReg); + emit->emitIns_R_R(ins, emitTypeSize(TYP_SIMD16), op1Reg, op2Reg); emit->emitIns_R(INS_setpo, EA_1BYTE, targetReg); emit->emitIns_R(INS_sete, EA_1BYTE, tmpReg); @@ -906,6 +918,9 @@ void CodeGen::genSSE2Intrinsic(GenTreeHWIntrinsic* node) instruction ins = Compiler::insOfHWIntrinsic(intrinsicID, baseType); regNumber tmpReg = node->GetSingleTempReg(); + // Ensure we aren't overwriting targetReg + assert(tmpReg != targetReg); + emit->emitIns_R_R(ins, emitTypeSize(TYP_SIMD16), op1Reg, op2Reg); emit->emitIns_R(INS_setpe, EA_1BYTE, targetReg); emit->emitIns_R(INS_setne, EA_1BYTE, tmpReg); |