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author | Mike Danes <onemihaid@hotmail.com> | 2017-01-20 08:38:17 +0200 |
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committer | Mike Danes <onemihaid@hotmail.com> | 2017-01-20 08:38:17 +0200 |
commit | 7ae68c2a0b3e1c97feace9757248b4b5ff115022 (patch) | |
tree | 532ad6170069c6e47fd81d8805e139e2cfdd1e6f /src/jit/gtlist.h | |
parent | 8686b6459a7c86a21fed6ee175a833d3fa8e953f (diff) | |
download | coreclr-7ae68c2a0b3e1c97feace9757248b4b5ff115022.tar.gz coreclr-7ae68c2a0b3e1c97feace9757248b4b5ff115022.tar.bz2 coreclr-7ae68c2a0b3e1c97feace9757248b4b5ff115022.zip |
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Diffstat (limited to 'src/jit/gtlist.h')
-rw-r--r-- | src/jit/gtlist.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/jit/gtlist.h b/src/jit/gtlist.h index fb6d8e891f..2d9255b6ce 100644 --- a/src/jit/gtlist.h +++ b/src/jit/gtlist.h @@ -146,6 +146,13 @@ GTNODE(LE , "<=" ,GenTreeOp ,0,GTK_BINOP|GTK_RE GTNODE(GE , ">=" ,GenTreeOp ,0,GTK_BINOP|GTK_RELOP) GTNODE(GT , ">" ,GenTreeOp ,0,GTK_BINOP|GTK_RELOP) #ifndef LEGACY_BACKEND +// These are similar to GT_EQ/GT_NE but they generate "test" instead of "cmp" instructions. +// Currently these are generated during lowering for code like ((x & y) eq|ne 0) only on +// XArch but ARM could too use these for the same purpose as there is a "tst" instruction. +// Note that the general case of comparing a register against 0 is handled directly by +// codegen which emits a "test reg, reg" instruction, that would be more difficult to do +// during lowering because the source operand is used twice so it has to be a lclvar. +// Because of this there is no need to also add GT_TEST_LT/LE/GE/GT opers. GTNODE(TEST_EQ , "testEQ" ,GenTreeOp ,0,GTK_BINOP|GTK_RELOP) GTNODE(TEST_NE , "testNE" ,GenTreeOp ,0,GTK_BINOP|GTK_RELOP) #endif |