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| author | Bruce Forstall <brucefo@microsoft.com> | 2019-04-03 23:23:39 -0700 |
|---|---|---|
| committer | Bruce Forstall <brucefo@microsoft.com> | 2019-04-05 17:50:31 -0700 |
| commit | 5c4ad70ed7bcc178122d02f75f136841a329f16e (patch) | |
| tree | 2bcfff11114ef5722c060e71e2055e97ee2596fa /src/jit/compiler.h | |
| parent | 76a60f410e9703c3350c8fc26c6f5ba077a01743 (diff) | |
| download | coreclr-5c4ad70ed7bcc178122d02f75f136841a329f16e.tar.gz coreclr-5c4ad70ed7bcc178122d02f75f136841a329f16e.tar.bz2 coreclr-5c4ad70ed7bcc178122d02f75f136841a329f16e.zip | |
WIP Fix ARM32/ARM64 large frame stack probing
Diffstat (limited to 'src/jit/compiler.h')
| -rw-r--r-- | src/jit/compiler.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/jit/compiler.h b/src/jit/compiler.h index 400e61b1f3..24153d6f51 100644 --- a/src/jit/compiler.h +++ b/src/jit/compiler.h @@ -10491,11 +10491,14 @@ extern const BYTE genActualTypes[]; // VERY_LARGE_FRAME_SIZE_REG_MASK is the set of registers we need to use for // the probing loop generated for very large stack frames (see `getVeryLargeFrameSize`). +// We only use this to ensure that if we need to reserve a callee-saved register, +// it will be reserved. For ARM32, only R12 and LR are non-callee-saved, non-argument +// registers, so we save at least one more callee-saved register. For ARM64, however, +// we already know we have at least three non-callee-saved, non-argument integer registers, +// so we don't need to save any more. #ifdef _TARGET_ARM_ -#define VERY_LARGE_FRAME_SIZE_REG_MASK (RBM_R4 | RBM_R5 | RBM_R6) -#elif defined(_TARGET_ARM64_) -#define VERY_LARGE_FRAME_SIZE_REG_MASK (RBM_R9 | RBM_R10 | RBM_R11) +#define VERY_LARGE_FRAME_SIZE_REG_MASK (RBM_R4) #endif /*****************************************************************************/ |