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| author | Carol Eidt <carol.eidt@microsoft.com> | 2017-08-10 23:31:17 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-08-10 23:31:17 -0700 |
| commit | d31498d30417f861ec682f235535002828b3fc91 (patch) | |
| tree | 3beb86fdcf402dd7e91570ea7c87fb11baef1ced /src/jit/codegenlinear.cpp | |
| parent | a1dce4fced328c9687293f6d80e1e0cea8b90ca4 (diff) | |
| parent | f6b794ba42716ae6ffea790eebbabc3900a973cb (diff) | |
| download | coreclr-d31498d30417f861ec682f235535002828b3fc91.tar.gz coreclr-d31498d30417f861ec682f235535002828b3fc91.tar.bz2 coreclr-d31498d30417f861ec682f235535002828b3fc91.zip | |
Merge pull request #13306 from hseok-oh/ryujit/fix_13156
Fix lclVar move node type inserted on lsra resolve phase
Diffstat (limited to 'src/jit/codegenlinear.cpp')
| -rw-r--r-- | src/jit/codegenlinear.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/jit/codegenlinear.cpp b/src/jit/codegenlinear.cpp index eb49edbf8d..9e96ebfc79 100644 --- a/src/jit/codegenlinear.cpp +++ b/src/jit/codegenlinear.cpp @@ -735,7 +735,7 @@ void CodeGen::genSpillVar(GenTreePtr tree) restoreRegVar = true; } - instruction storeIns = ins_Store(tree->TypeGet(), compiler->isSIMDTypeLocalAligned(varNum)); + instruction storeIns = ins_Store(lclTyp, compiler->isSIMDTypeLocalAligned(varNum)); #if CPU_LONG_USES_REGPAIR if (varTypeIsMultiReg(tree)) { |