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authorCarol Eidt <carol.eidt@microsoft.com>2018-12-13 15:46:40 -0800
committerCarol Eidt <carol.eidt@microsoft.com>2018-12-13 15:51:23 -0800
commit61bdd1c239ce0f0c575b3ecc62e2c29ce9e27ede (patch)
tree99d0791f7f8f1763143a2d6b45e0a65cc9c82648 /src/jit/codegenlinear.cpp
parent13f8624a5526d9e71c6b8383c68be0afded8d596 (diff)
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Update var life for multireg local
When a multi-reg var is defined by a call, but doesn't currently reside in a register, we must still update liveness. Fix #21500
Diffstat (limited to 'src/jit/codegenlinear.cpp')
-rw-r--r--src/jit/codegenlinear.cpp31
1 files changed, 23 insertions, 8 deletions
diff --git a/src/jit/codegenlinear.cpp b/src/jit/codegenlinear.cpp
index f474b88ab1..3d4fe1a349 100644
--- a/src/jit/codegenlinear.cpp
+++ b/src/jit/codegenlinear.cpp
@@ -512,15 +512,30 @@ void CodeGen::genCodeForBBlist()
// it up to date for vars that are not register candidates
// (it would be nice to have a xor set function)
- VARSET_TP extraLiveVars(VarSetOps::Diff(compiler, block->bbLiveOut, compiler->compCurLife));
- VarSetOps::UnionD(compiler, extraLiveVars, VarSetOps::Diff(compiler, compiler->compCurLife, block->bbLiveOut));
- VarSetOps::Iter extraLiveVarIter(compiler, extraLiveVars);
- unsigned extraLiveVarIndex = 0;
- while (extraLiveVarIter.NextElem(&extraLiveVarIndex))
- {
- unsigned varNum = compiler->lvaTrackedToVarNum[extraLiveVarIndex];
+ VARSET_TP mismatchLiveVars(VarSetOps::Diff(compiler, block->bbLiveOut, compiler->compCurLife));
+ VarSetOps::UnionD(compiler, mismatchLiveVars,
+ VarSetOps::Diff(compiler, compiler->compCurLife, block->bbLiveOut));
+ VarSetOps::Iter mismatchLiveVarIter(compiler, mismatchLiveVars);
+ unsigned mismatchLiveVarIndex = 0;
+ bool foundMismatchedRegVar = false;
+ while (mismatchLiveVarIter.NextElem(&mismatchLiveVarIndex))
+ {
+ unsigned varNum = compiler->lvaTrackedToVarNum[mismatchLiveVarIndex];
LclVarDsc* varDsc = compiler->lvaTable + varNum;
- assert(!varDsc->lvIsRegCandidate());
+ if (varDsc->lvIsRegCandidate())
+ {
+ if (!foundMismatchedRegVar)
+ {
+ JITDUMP("Mismatched live reg vars after BB%02u:", block->bbNum);
+ foundMismatchedRegVar = true;
+ }
+ JITDUMP(" V%02u", varNum);
+ }
+ }
+ if (foundMismatchedRegVar)
+ {
+ assert(!"Found mismatched live reg var(s) after block");
+ JITDUMP("\n");
}
#endif