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authorBrian Sullivan <briansul@microsoft.com>2019-02-15 18:06:38 -0800
committerBrian Sullivan <briansul@microsoft.com>2019-02-19 13:40:46 -0800
commitb44f11e57491f813ab6c7e760c01a902e35bcdf4 (patch)
treeaa434f28943545551e0a1936b446ddc73ca9b0b3 /src/jit/codegenarmarch.cpp
parent7a6b440b5503e38e1847af68b3fc59692d9d2770 (diff)
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Correct the assert to add R8 as a potential valid register
Also fix the calls to RemoveElemD to use lvVarIndex Re-enable the interop tests that were failing on ARM64
Diffstat (limited to 'src/jit/codegenarmarch.cpp')
-rw-r--r--src/jit/codegenarmarch.cpp14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/jit/codegenarmarch.cpp b/src/jit/codegenarmarch.cpp
index e8f38b7b81..5147f4ec1e 100644
--- a/src/jit/codegenarmarch.cpp
+++ b/src/jit/codegenarmarch.cpp
@@ -2717,14 +2717,14 @@ void CodeGen::genJmpMethod(GenTree* jmp)
if (compiler->lvaIsGCTracked(varDsc))
{
- VarSetOps::RemoveElemD(compiler, gcInfo.gcVarPtrSetCur, varNum);
+ VarSetOps::RemoveElemD(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex);
}
}
- // In case of a jmp call to a vararg method ensure only integer registers are passed.
if (compiler->info.compIsVarArgs)
{
- assert((genRegMask(argReg) & RBM_ARG_REGS) != RBM_NONE);
+ // In case of a jmp call to a vararg method ensure only integer registers are passed.
+ assert((genRegMask(argReg) & (RBM_ARG_REGS | RBM_ARG_RET_BUFF)) != RBM_NONE);
fixedIntArgMask |= genRegMask(argReg);
@@ -2740,7 +2740,9 @@ void CodeGen::genJmpMethod(GenTree* jmp)
firstArgVarNum = varNum;
}
}
-#else
+
+#else // !_TARGET_ARM64_
+
bool twoParts = false;
var_types loadType = TYP_UNDEF;
if (varDsc->TypeGet() == TYP_LONG)
@@ -2835,9 +2837,9 @@ void CodeGen::genJmpMethod(GenTree* jmp)
if (compiler->lvaIsGCTracked(varDsc))
{
- VarSetOps::RemoveElemD(compiler, gcInfo.gcVarPtrSetCur, varNum);
+ VarSetOps::RemoveElemD(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex);
}
-#endif
+#endif // !_TARGET_ARM64_
}
// Jmp call to a vararg method - if the method has fewer than fixed arguments that can be max size of reg,