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author | Jiyoung Yun <jy910.yun@samsung.com> | 2017-02-10 20:35:12 +0900 |
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committer | Jiyoung Yun <jy910.yun@samsung.com> | 2017-02-10 20:35:12 +0900 |
commit | 4b11dc566a5bbfa1378d6266525c281b028abcc8 (patch) | |
tree | b48831a898906734f8884d08b6e18f1144ee2b82 /src/jit/codegen.h | |
parent | db20f3f1bb8595633a7e16c8900fd401a453a6b5 (diff) | |
download | coreclr-4b11dc566a5bbfa1378d6266525c281b028abcc8.tar.gz coreclr-4b11dc566a5bbfa1378d6266525c281b028abcc8.tar.bz2 coreclr-4b11dc566a5bbfa1378d6266525c281b028abcc8.zip |
Imported Upstream version 1.0.0.9910upstream/1.0.0.9910
Diffstat (limited to 'src/jit/codegen.h')
-rwxr-xr-x | src/jit/codegen.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/jit/codegen.h b/src/jit/codegen.h index c6e38ab6af..090283ee50 100755 --- a/src/jit/codegen.h +++ b/src/jit/codegen.h @@ -390,6 +390,8 @@ protected: // Save/Restore callee saved float regs to stack void genPreserveCalleeSavedFltRegs(unsigned lclFrameSize); void genRestoreCalleeSavedFltRegs(unsigned lclFrameSize); + // Generate VZeroupper instruction to avoid AVX/SSE transition penalty + void genVzeroupperIfNeeded(bool check256bitOnly = true); #endif // _TARGET_XARCH_ && FEATURE_STACK_FP_X87 |